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ShivamKurekar/README.md
T-Rex Runner

Shivam

VLSI Design & Verification Engineer

Verilog SystemVerilog FPGA UVM Formal Verification


Currently

🔭 Working on 🌱 Exploring
Design & Verification at SoC level Advanced UVM methodologies & Formal Verification

What I do

  • ◉  Designing digital logic and verifying every corner case
  • ◉  Turning waveforms into insights
  • ◉  Finding bugs before they become silicon
  • ◉  Ask me about Verilog, SystemVerilog, and FPGA-based system design

Usually one simulation away from either a breakthrough — or a brand new bug.

Popular repositories Loading

  1. My_ROS2_Learnings My_ROS2_Learnings Public

    My Robot Operating System 2 (ROS2) Learnings

    Python

  2. my_bot my_bot Public

    My first mobile robot in ROS2

    Python

  3. MCU-Datalogger MCU-Datalogger Public

    HTML

  4. Four-Layer-ESP32-IoT-PCB Four-Layer-ESP32-IoT-PCB Public

    Four-Layer ESP32 IoT PCB

  5. Single-Port-RAM Single-Port-RAM Public

    Single port RAM Theory and project on Quartus Prime (Implemented on Intel DE10-Lite)

    HTML

  6. 4_Axis_External_Driver 4_Axis_External_Driver Public

    Forked from bdring/4_Axis_External_Driver

    A Grbl_ESP32 Controller for External Stepper Drivers