[AMDGPU] comgr: fix VOP3PX2 scale_src2 false SGPR dependency

[xintin]

Summary

VOP3PX2 V_WMMA_SCALE* instructions have an unused scale_src2 field at bits [58:50] (see VOP3PX2e::Inst{58-50} in VOP3PInstructions.td) that the SQ incorrectly decodes as an SGPR reference, causing a 3-cycle SALU stall after WMMA co-execution. This patch sets the field to VGPR0 encoding (0x100) to prevent the false dependency. Applies to both A0 and B0 steppings.

The fix uses raw byte manipulation because scale_src2 is a hardware encoding artifact not modeled as an MC operand. The MC layer has no mechanism to read or set this field.

This only fires on the B0-to-A0 hotswap rewrite path. A0-native binaries are compiled with an A0-targeted Clang that sets the field correctly at codegen time.

Changes

• comgr-hotswap-patch-vop3px2-src2.cpp: applyVop3px2Src2Fix whole-kernel pass. Matches the 4 known v_wmma_scale* mnemonics via explicit StringSwitch enumeration (not starts_with), patches bits [58:50] in place. Includes diagnostic logging on size/bounds skip paths and a gated summary log.
• comgr-hotswap-internal.h: Declare patchScaleSrc2 for unit testing.
• comgr-hotswap-b0a0.cpp: Add declaration, weak stub, and dispatcher call for applyVop3px2Src2Fix.
• CMakeLists.txt: Add new source to library build.
• hotswap-vop3px2-src2.s: Positive lit test -- kernel with v_wmma_scale_f32_16x16x128_f8f6f4. Verifies instruction survives patching and idempotency (second rewrite produces identical bytes, which proves the first pass set the field to VGPR0 since the assembler default is not VGPR0).
• hotswap-vop3px2-src2-noop.s: Passthrough lit test -- kernel with regular (non-scale) WMMA. Verifies no v_wmma_scale appears and layout is preserved.
• HotswapMCTest.cpp: 6 new PatchScaleSrc2 unit tests covering zeroed field, all-ones field, already-VGPR0 (returns false), idempotency (patch + re-patch), byte preservation outside scale_src2, and non-scale-src2 bit preservation.
• test-unit/CMakeLists.txt: Link new source into HotswapMCTests.

Tests

• 2 lit tests (positive + passthrough) with idempotency checks
• 6 unit tests for patchScaleSrc2 byte-level correctness
• All existing lit, ctest, and unit tests pass

Follow-up (deferred)

• isVop3px2ScaleInst unit tests (known-variant + near-miss coverage); requires exposing the function in the header
• TSFlags-based dispatch instead of mnemonic StringSwitch
• Cache resolved opcodes in LLVMState at init time (same follow-up as [AMDGPU] comgr: swap s_barrier_signal_isfirst to s_barrier_signal for A0 #2287)

[z1-cciauto]

PSDB Link: https://compiler-ci.amd.com/job/compiler-psdb-amd-staging/5401

[z1-cciauto]

PSDB Link: https://compiler-ci.amd.com/job/compiler-psdb-amd-staging/5584

[z1-cciauto]

PSDB Link: https://compiler-ci.amd.com/job/compiler-psdb-amd-staging/5605

[z1-cciauto]

PSDB Link: https://compiler-ci.amd.com/job/compiler-psdb-amd-staging/5636

[chinmaydd]

LGTM, thanks !

[lamb-j]

PSDB passes Comgr tests, Windows compiler-runtime Multi-Arch passed. Failures unrelated