fix(Relu, Quant): Re-order Relu to be above Quantization.

[nogieman]

#PR Summary:

• Relu activation now has been placed before quantization.
• Input bit-widths have been changed in the pipeline accordingly.
• Refer to issue Activation quantization re-ordering #268

[nogieman]

The PR has been tested on Cifar10_int8.onnx and yolov8n models (9x4x4 architecture).
Will update after testing on mobilenet with 16x1x16 architecture. @dpks2003 @Prem-Swarup

[nogieman]

It has been tested with imagenet_mobilenetv2-int8-symmetric.onnx and cifar10 mobilenet with 16x1x16 architecture.

[dpks2003]

please check it on all the existing model and update the accuracy here and compare with already existing accuracy.

[dpks2003]

the PR is approved will merge after getting the accuracy numbers.
@nogieman good job with quick work

[dpks2003]

PR on hold as lack of clarity.

[nogieman]

Accuracy Comparison (CPU vs FPGA)

Model	CPU Accuracy	FPGA Accuracy
cifar10_average_pool_int8.onnx	70%	70%
cifar10_int8.onnx	77%	77–79%
cifar10_vgg11.onnx	95%	95%
cifar10_vgg16.onnx	96%	96%
cifar10_vgg19.onnx	96%	96%
cifar10_mobilenetv2_x0_5.onnx	93%	92–93%
cifar10_mobilenetv2_x0_75.onnx	93%	92–93%
cifar10_mobilenetv2_x1_0.onnx	93%	93%
cifar10_mobilenetv2_x1_4.onnx	93%	92–93%
cifar10_sig_model2_int8.onnx	75%	73–75%
mnist_average_pool_int8.onnx	100%	99–100%
mnist_int8_k1x7_nomaxpool.onnx	99%	99%
mnist_int8_pad2.onnx	86%	86%
mnist_int8_pad4343.onnx	100%	100%
mnist_int8_stride2.onnx	75%	75%
mnist_int8_stride2_pad0.onnx	88%	88%
mnistpad1_6_28_int8.onnx	99%	99%
mnist_qlinearadd2.onnx	94%	94%
imagenet_mobilenetv2-int8-symmetric.onnx	80%	78-80%

[dpks2003]

This pr is on hold as further discussion and simulations are to be done on this.

[dpks2003]

The SA needs to be converted to the uint8 and so are the other compute blocks.