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π First Year PhD Student in Electrical and Computer Engineering at UC Santa Cruz.
I build end-to-end intelligent systems, focusing on the vertical integration of AI models, hardware acceleration, and custom LLM execution platforms. My expertise spans the entire stack: from writing high-performance Triton/CUDA kernels to designing custom ASIC/FPGA architectures and high-speed PCBs optimized for LLM inference clusters.
π Current Research & Engineering Focus:
π LLM Systems & Inference Infra: Optimizing inference nodes through Prefill/Decode & Attn/FFN disaggregation; implementing low-latency operators via Triton/CUDA.
β‘ Hardware Acceleration & Silicon: Designing specialized Neural Accelerators on FPGA/ZYNQ and ASIC architectures; designing High-Speed PCBs to serve as dedicated hardware platforms for LLM execution.
π Interconnect & System Scaling: Profiling KV-cache behaviors and optimizing high-performance node interconnects for large-scale language model deployment.