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@RomanHargrave RomanHargrave commented Oct 23, 2025

Note: this is in draft because I need to test it, and possibly deal with some other driver shenanigans of a similar nature to do so.

This adds support for the above-mentioned model of panel from RZW. This panel is found in certain industrial HMIs manufactured by EDATEC (e.g. the ED3010-*). Unfortunately, these enclosures are (currently) only usable with a modified build of Linux 6.6 that EDATEC have not released any source code for. Among other changes, that kernel image includes additional ili9881c device profiles for the display found in the enclosures I wish to use. Notably, where ili9881c would turn on the reset pin to reset the device, the modified ili9881c found in that image turns off the reset pin. I have added functionality to invert reset polarity as such.

P33M and others added 30 commits October 20, 2025 19:13
For unknown reasons the controller seems to reset the idle polling timer
interval on CQE enable/disable to 8 clocks which is extremely short.

Just use the reset value in the eMMC spec (4096 clock periods which at
200MHz is ~20uS).

Signed-off-by: Jonathan Bell <[email protected]>
The eMMC spec says that in certain circumstances the controller can't
respond to a halt request - in practice, this occurs if a CMD
timeout happens (card went away/crashed).

Clear the halt request by writing 0 to CQHCI_CTL. Also fix a logic error
testing for halt in cqhci_request.

Signed-off-by: Jonathan Bell <[email protected]>
Certain status bits in these registers may need polling outside of
SD-specific code. Export in sd_ops.h

Signed-off-by: Jonathan Bell <[email protected]>
Don't attempt to turn on CQ if the other mandatory features are not
indicated as supported by the card. Also make sure that the register write
actually stuck, as some cards claim support but never report back that
the queue engine is enabled.

Signed-off-by: Jonathan Bell <[email protected]>
Also report the card's supported queue depth in the message log.

Signed-off-by: Jonathan Bell <[email protected]>
The spec allows for up to two 512-byte pages to be allocated for the
Extension Register General Info block, so allocate accordingly.

Signed-off-by: Jonathan Bell <[email protected]>
The attached PHY performs parameter validation, so the switch from HS200
to HS (before selecting HS400/HS400es) with a 200MHz clock fails to
update pad timings and results in CRC errors from the card.

Underclocking the interface is safe, so do that in the downgrade callback.

Signed-off-by: Jonathan Bell <[email protected]>
This gains about 8-12% sequential write speed with the fastest SD/eMMC
cards, and Class A1/A2 card sequential performance is only assured with
a 4MiB write length.

Signed-off-by: Jonathan Bell <[email protected]>
If the controller is being reset, then the CQE needs to be reset as well.

For removable cards, CQHCI_SSC1 must specify a polling mode (CBC=0)
otherwise it's possible that the controller stops emitting periodic
CMD13s on card removal, without raising an error status interrupt.

Signed-off-by: Jonathan Bell <[email protected]>
Recovery claims the MMC card so the card-detect work gets significantly
delayed - leading to lots of error recovery loops that can never do
anything but fail.

Explicitly detect the card after CQE has halted and bail if it's not
there.

Also ratelimit a not-very-descriptive warning - one occurrence in dmesg
is enough to signal that something is amiss.

Signed-off-by: Jonathan Bell <[email protected]>
Command Queueing requires Write Cache and Power off Notification support
from the card - but using the write cache forms a contract with the host
whereby the card expects to be told about impending power-down.

The implication is that (for performance) the card can do unsafe things
with pending write data - including reordering what gets committed to
nonvolatile storage at what time.

Exposed SD slots and platforms powered by hotpluggable means (i.e.
Raspberry Pis) can't guarantee that surprise removal won't happen.

To limit the scope for cards to invent new ways to trash filesystems,
limit pending writes to 1 (equivalent to the non-CQ behaviour).

Signed-off-by: Jonathan Bell <[email protected]>

fixup: mmc: restrict posted write counts for SD cards in CQ mode

Leaving card->max_posted_writes unintialised was a bad thing to do.

Also, cqe_enable is 1 if hsq is enabled as hsq substitutes the cqhci
implementation with its own.

Signed-off-by: Jonathan Bell <[email protected]>
Posted write tracking introduced in the commit below raced with re-use
of the requests between completion and submission, potentially causing
underflow of the pending write count.

Fixes: e6c1e86 ("mmc: restrict posted write counts for SD cards in CQ mode")

Signed-off-by: Jonathan Bell <[email protected]>
Samsung EVO Plus, Pro Plus and Evo Ultimate cards of this era appear to
have a broken cache-flush implementation when operating in CQ mode.

Unfortunately the cards seem to use a separate CID name string for every
variant and capacity, so nobble the cache feature for this MANFID, OEMID
and year. Turning this off seems to have negligible impact on
random-write throughput in non-CQ mode.

Signed-off-by: Jonathan Bell <[email protected]>
Cards with manufacture dates in 2019 and 2020 have been seen in the wild
that hang indefinitely if issued a cache flush command in CQ mode.

Signed-off-by: Jonathan Bell <[email protected]>
Only CMD38 with Arg=0x1 (Discard) is supported when in CQ mode, so
turn it off before issuing a non-discard erase op.

Signed-off-by: Jonathan Bell <[email protected]>
Recent Integral cards end up with corrupt sectors after a flash erase.
This covers sizes for the A2 range, which can't be differentiated from
the A1 range which might not have the same issue.

Signed-off-by: Jonathan Bell <[email protected]>
Newer versions of the DesignWare I2C block support the detection of
stuck signals, and a mechanism to recover from them. Add the required
software support to the driver.

This change was prompted by the observation that reading a single byte
from register 0 of a VEML7700 seems to cause it to issue an ACK too
early, and the controller to complain about losing arbitration. There
is a suspicion that this may be a more widespread problem, but at least
this patch prevents the bus from locking up.

See: raspberrypi#6057

Signed-off-by: Phil Elwell <[email protected]>
In the absence of a value in Device Tree, set the SDA hold time to half
the SCL low time.

Signed-off-by: Phil Elwell <[email protected]>
This code:
for_each_sg(sgl, sg, sg_len, i)
  num_sgs += DIV_ROUND_UP(sg_dma_len(sg), axi_block_len);

determines how many hw_desc are allocated.
If sg_dma_len(sg)=0 we don't allocate for this sgl.

However in the next loop, we will increment loop
for this case, and loop gets higher than num_sgs
and we trample memory.

Signed-off-by: Dom Cobley <[email protected]>
"rotation" is listed as a standard property of panels in panel-common.yaml,
therefore it would be logical to process that from within the core
code should a panel driver not implement the get_orientation hook.

Call of_drm_get_panel_orientation from
drm_connector_set_orientation_from_panel to get that information.

This removes the need for any boiler-plate in panel drivers for calling
drm_connector_set_orientation_from_panel or
drm_connector_set_panel_orientation.

Signed-off-by: Dave Stevenson <[email protected]>
The autodetection of resolution/timing by the TC358762 can lead
to the display being shifted by a pixel or two.

Program the TC358762 with the requested mode timing so that
it can reproduce it accurately.

Signed-off-by: Dave Stevenson <[email protected]>
Reverts 8a4b2fc ("drm/bridge: tc358762: Split register programming from pre-enable to enable")
as we want the config commands sent before video starts.

Signed-off-by: Dave Stevenson <[email protected]>
Having accepted the upstream change to add the persist_gpio_outputs
parameter, make it true by default.

See: raspberrypi#6117

Signed-off-by: Phil Elwell <[email protected]>
Even when configured to use only gpiod CS lines, the DW SPI controller
still expects a bit to be set in the SER register, otherwise transfers
stall. For the csgpiod case, nominate bit 0 for the job.

See: raspberrypi#6159

Signed-off-by: Phil Elwell <[email protected]>
The naming of backlight devices is not terribly useful for
associating a backlight controller with a display (assuming
it is attached to one).

Add a sysfs node that will return a display name that can be set
by other subsystems.

Signed-off-by: Dave Stevenson <[email protected]>
Pass the DRM connector name to any configured backlight
device so that userspace can associate the two items.

Ideally this should be in drm_panel, but it is bridge/panel
that creates the drm_connector and therefore knows the name.

Signed-off-by: Dave Stevenson <[email protected]>

drm/bridge: panel: Ensure backlight is reachable

Ensure that the various options of modules vs builtin results
in being able to call into the backlight code.

raspberrypi#6198

Fixes: 573f8fd ("drm/bridge: panel: Name an associated backlight device")
Signed-off-by: Dave Stevenson <[email protected]>
Add version 4.17.1 of the Hailo PCIe device drivers.
Sourced from https://github.com/hailo-ai/hailort-drivers/

Signed-off-by: Naushir Patuck <[email protected]>

drivers: media: pcie: hailo: Fix include paths

An attempt to fix the include paths - they look reasonable, but the
GitHub auto-builds fail.

Signed-off-by: Phil Elwell <[email protected]>

drivers: media: pci: Update Hailo accelerator device driver to v4.18.0

Sourced from https://github.com/hailo-ai/hailort-drivers/

Signed-off-by: Naushir Patuck <[email protected]>

drivers: media: pci: Add wrapper after removal of follow_pfn

drivers: media: pci: Fix Hailo compile warnings

Signed-off-by: Phil Elwell <[email protected]>

drivers: media: pci: Update Hailo accelerator device driver to v4.19

Sourced from https://github.com/hailo-ai/hailort-drivers/

Signed-off-by: Naushir Patuck <[email protected]>

drivers: media: pci: Update Hailo accelerator device driver to v4.20

Sourced from https://github.com/hailo-ai/hailort-drivers

Signed-off-by: Naushir Patuck <[email protected]>

drivers: pci: hailo: Fix kernel warning when calling find_vdma()

Calling this function without holding the mmap_read_lock causes the
kernel to throw an error message, spamming the dmesg logs when running
the Hailo hardware.

Fix it by adding the approprite lock/unlock functions around find_vdma().

Signed-off-by: Naushir Patuck <[email protected]>

drivers: pci: hailo: Better lock handling when calling find_vdma()

Due to possible instabilities, reduce the mmap read lock time to only
cover the call to find_vdma().

Signed-off-by: Naushir Patuck <[email protected]>
Add helpers to set and get vchiq driver data. vchiq_set_drvdata() and
vchiq_get_drvdata() wraps dev_set_drvdata() and dev_get_drvdata()
respectively.

Signed-off-by: Umang Jain <[email protected]>
Signed-off-by: Kieran Bingham <[email protected]>
Offset the backend dev-nodes starting at /dev/video20
onwards to maintain backward compatibility with the
pre-upstreamed kernel driver.

Signed-off-by: Naushir Patuck <[email protected]>
Add YAML device tree bindings for the Raspberry Pi RP2040 GPIO Bridge.

Signed-off-by: Richard Oliver <[email protected]>
macmpi and others added 4 commits October 21, 2025 20:26
There were various points where the loader was using uninitialised
data, had the potential to run off the end of an array, or was
handling core functions incorrectly. Fix these up.

Also handle 24bpp and 32bpp framebuffers.

Signed-off-by: Dave Stevenson <[email protected]>
The mappings are the reverse of r8g8b8 and r5g6b5 respectively

Signed-off-by: Dave Stevenson <[email protected]>
Modify the PDAF Datatype of the Arducam 64MP camera from 0x30 to 0x12
so that the Raspberry Pi 5 cfe driver can receive PDAF data.

Signed-off-by: Lee Jackson <[email protected]>
@6by9
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6by9 commented Oct 23, 2025

Releasing a kernel image without offering the source code is in breach of the GPLv2 licence the Linux kernel is released under. You could point them to term 3 of https://www.gnu.org/licenses/old-licenses/gpl-2.0.html and ask them which of the 3 options they comply.
We do work with EDATEC, so I can give them a nudge if you get no joy.

The extra init sequences, display modes, and compatible lookups I have no issue with.

Inverting the reset line should be done via the overlay. If it were our V2 panels that use ILI9881 with the vc4-kms-dsi-ili9881-7inch overlay, changing line 56 from:

reset-gpio = <&display_mcu 0 GPIO_ACTIVE_LOW>;

to

reset-gpio = <&display_mcu 0 GPIO_ACTIVE_HIGH>;

would do the same as your code change.
The state requested in the driver is meant to be the logical state for the signal, hence gpiod_set_value_cansleep(ctx->reset, 0); to deassert reset and become active. Physical state is conveyed via the ACTIVE_[HIGH|LOW] option.

@RomanHargrave
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RomanHargrave commented Oct 23, 2025 via email

@popcornmix popcornmix force-pushed the rpi-6.18.y branch 3 times, most recently from 94bf012 to 899d8e0 Compare November 3, 2025 12:01
@popcornmix popcornmix force-pushed the rpi-6.18.y branch 4 times, most recently from d003d86 to dff72a6 Compare December 1, 2025 12:35
@xxxajk
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xxxajk commented Dec 19, 2025

<3 This is exactly what I was looking for! Thank you! <3

I will test this out and let you know if it works for me. I also need to port this to an android kernel.

@RomanHargrave
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@6by9 I have been preoccupied with work and so haven't drilled down on the BL regulator stuff; however, I did reach out again and am still receiving the silent treatment from EDATEC.

@xxxajk let me know how it goes - I hadn't tested just the panel init changes on their own based on the assumption that it would be fairly uneventful without the added backlight regulator driver.

@xxxajk
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xxxajk commented Dec 19, 2025

I'll pull straight from your repo instead of from here.

@xxxajk
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xxxajk commented Dec 19, 2025

@6by9 I have been preoccupied with work and so haven't drilled down on the BL regulator stuff; however, I did reach out again and am still receiving the silent treatment from EDATEC.

I can poke at them from my client's corporate email. They will want to be using this display, and would order 1k-2k of these per year... Think that'd get their attention?

@RomanHargrave
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@xxxajk that might attract a more favorable response. If you get kernel/module sources, do share here of course.

@xxxajk
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xxxajk commented Dec 19, 2025

@RomanHargrave of course I will! I'm surprised that they don't just have it posted to their repos collection over here:

https://github.com/edatec

At least it seems they are trying, or tried at some point.

I'm an old skool kernel hacker from the 90's btw, seen this happen so many times.
One of the worse ever thing I ran into was cdrom drives that had bad firmware, and the fix was to slow down from 2x speed to 1x speed for a few sectors until the laser got past the bad area. Thing is that it wouldn't really give you an honest error reply, and just spill trash.

@xxxajk
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xxxajk commented Dec 19, 2025

@RomanHargrave @6by9
Sent out a request for the sources, from my client's corporate account, with explanation.
Basically we wish to move to this display instead of the crappy plastic ones that are on hdmi and use usb hacks.
Since we use Android, and not raspi os, we totally need the sources for a port.
Let's see what happens...

@RomanHargrave
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Super. Yeah, I was pretty stoked to see these given the alternatives. Needless to say, I was quite disappointed at the total miss on software support...

@xxxajk
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xxxajk commented Dec 19, 2025

Good news is that I got a good solid reply. They also some-how plan on an opensource release to rpi foundation mid January, however I'm not so sure they understand the submission process at all. I should have something soon as far as sources.

@JamesH65
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Tell EdaTec to email [email protected] for help (It's Ltd, not Foundation btw) if they are having problems submitting code to us. I can talk to the boss and get things moving.

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