This repository contains VHDL Codes for the practical session of VLSI Technology and Design subject.
Legends:
- B = Behavioral Model;
- S = Structural Model;
- D = Dataflow Model
This repository contains the following
- Half Adder (B/S/D) with Testbench
- Full Adder (B/S/D) with Testbench
- 4:1 Mux (B/S/D) with Testbench
- 4:1 Demux (B/S/D) with Testbench
- 4x2 Encoder (B/D) with Testbench
- 8x3 Encoder (B/S/D) with Testbench
- 3x8 Decoder (B/S/D) with Testbench
- Flip Flops (SR/D/JK/T) Behavioural Code with Testbench
- Common Gates used in the files
-- This is being updated --