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Precheckin: Use shorter form for i16 operands#2565

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rampitec wants to merge 1 commit into
amd-stagingfrom
smekhano/i16-literals-as-inlinef16
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Precheckin: Use shorter form for i16 operands#2565
rampitec wants to merge 1 commit into
amd-stagingfrom
smekhano/i16-literals-as-inlinef16

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For 16-bit operands an inline constant is zero extended which in particular allows to use FP constants. These will have 16 bits of zeroes in the high half and FP16 value in the low 16 bits.

DO NOT MERGE!

@rampitec rampitec force-pushed the smekhano/i16-literals-as-inlinef16 branch 3 times, most recently from 8a46250 to 380cc67 Compare May 17, 2026 17:36
For 16-bit operands an inline constant is zero extended
which in particular allows to use FP constants. These
will have 16 bits of zeroes in the high half and FP16
value in the low 16 bits.

DO NOT MERGE!
@rampitec rampitec force-pushed the smekhano/i16-literals-as-inlinef16 branch from 380cc67 to 9300e64 Compare May 19, 2026 20:10
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