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issue with 'type' parameter being ignored in transistor verilog-a model #152

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@nzagni91

When trying to simulate a CMOS inverter in ngspice with the MVS verilog-A model available on nanohub I ran into a peculiar issue with a parameter 'type' in the code that discriminates between the NMOS and PMOS.
Basically, the 'type' parameter is ignored! So when I included the model card the PMOS was behaving exactly as the NMOS, as it is the default.

I solved by renaming the 'type' parameter to 'tipe'.

Please be wary that also BSIM uses 'type' to define NMOS or PMOS, so it will also be affected!

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