Thank you for your code，it is really good！
And does this repo support for digital SRAM based IMC？I mean add AND,NOR etc gates into the cell of SRAM？
I reviewed your doc and I think this two modes are different from what I said above.
“With various device technologies, the chip could operate in different modes, such as digital sequential
(row-by-row) read-out for near-memory computing, or analog parallel read-out for in-memory computing.
In the simulator, the parameters of synaptic devices and synaptic array modes will be instantiated in
param.cpp. ”
Thank you very much!
Thank you for your code，it is really good！
And does this repo support for digital SRAM based IMC？I mean add AND,NOR etc gates into the cell of SRAM？
I reviewed your doc and I think this two modes are different from what I said above.
“With various device technologies, the chip could operate in different modes, such as digital sequential
(row-by-row) read-out for near-memory computing, or analog parallel read-out for in-memory computing.
In the simulator, the parameters of synaptic devices and synaptic array modes will be instantiated in
param.cpp. ”
Thank you very much!