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[arm64][riscv64][ppc64] Do scale to Hz the OPP voltage search per frequency
[arm64] Refactor the calculus of the C1 idle state [arm64] Attempt to fix the Core cycle and Retired Instruction counters state [CR] Misc code cleanup in the UI
1 parent e18d199 commit afa4264

6 files changed

Lines changed: 42 additions & 53 deletions

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‎aarch64/corefreq-cli.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8794,10 +8794,9 @@ void Pkg_Fmt_Freq( ASCII *item, ASCII *code, CLOCK *clock,
87948794
code, RSC(AUTOMATIC).CODE(),
87958795
unlock ? '<' : '[', ratio.Q, unlock ? '>' : ']');
87968796
} else {
8797-
const CLOCK clk = {.Q = clock->Q, .R = clock->R, .Hz = clock->Hz};
87988797
StrFormat(item, RSZ(CREATE_SELECT_FREQ_OFFLINE)+9+10+1,
87998798
"%s" "%7.2f MHz %c%4u %c ",
8800-
code, CLOCK_MHz(double, COF_FREQ_MHz(ratio, clk)),
8799+
code, CLOCK_MHz(double, COF_FREQ_MHz(ratio, (*clock))),
88018800
unlock ? '<' : '[', ratio.Q, unlock ? '>' : ']');
88028801
}
88038802
}

‎aarch64/corefreqk.c‎

Lines changed: 33 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -2475,13 +2475,10 @@ static unsigned long GetVoltage_From_OPP(unsigned int cpu,
24752475

24762476
static void Store_Voltage_Identifier (unsigned int cpu,
24772477
enum RATIO_BOOST boost,
2478-
unsigned long kHz )
2478+
unsigned long freq_Hz )
24792479
{
2480-
if (kHz > 0) {
2481-
unsigned long freq_Hz = 1000LU * kHz,
2482-
2483-
u_volt = GetVoltage_From_OPP(cpu, freq_Hz);
2484-
u_volt = u_volt >> 5;
2480+
if (freq_Hz > 0) {
2481+
unsigned long u_volt = GetVoltage_From_OPP(cpu, freq_Hz) >> 5;
24852482

24862483
PRIVATE(OF(Core, AT(cpu)))->OPP[boost].VID = (signed int) u_volt;
24872484
}
@@ -3328,9 +3325,6 @@ static void Core_Thermal_Worker(struct work_struct *work)
33283325

33293326
static void PerCore_GenericMachine(void *arg)
33303327
{
3331-
volatile PMUSERENR pmuser;
3332-
volatile PMCNTENSET enset;
3333-
volatile PMCNTENCLR enclr;
33343328
volatile REVIDR revid;
33353329
CORE_RO *Core = (CORE_RO *) arg;
33363330

@@ -3340,27 +3334,6 @@ static void PerCore_GenericMachine(void *arg)
33403334
Core->T.Cluster.Hybrid_ID = \
33413335
Core->Boost[BOOST(MAX)].Q < PUBLIC(RO(Proc))->Features.Factory.Ratio ?
33423336
Hybrid_Secondary : Hybrid_Primary;
3343-
}
3344-
if (PUBLIC(RO(Proc))->Features.PerfMon.Version > 0) {
3345-
__asm__ __volatile__(
3346-
"mrs %[pmuser], pmuserenr_el0" "\n\t"
3347-
"mrs %[enset], pmcntenset_el0" "\n\t"
3348-
"mrs %[enclr], pmcntenclr_el0" "\n\t"
3349-
"isb"
3350-
: [pmuser] "=r" (pmuser.value),
3351-
[enset] "=r" (enset.value),
3352-
[enclr] "=r" (enclr.value)
3353-
:
3354-
: "memory"
3355-
);
3356-
}
3357-
if (Core->Bind == PUBLIC(RO(Proc))->Service.Core) {
3358-
PUBLIC(RO(Proc))->Features.PerfMon.CoreCycles = pmuser.CR
3359-
| enset.C
3360-
| enclr.C;
3361-
PUBLIC(RO(Proc))->Features.PerfMon.InstrRetired = pmuser.IR
3362-
| enset.F0
3363-
| enclr.F0;
33643337
}
33653338
__asm__ __volatile__(
33663339
"mrs %[revid], revidr_el1" "\n\t"
@@ -3664,6 +3637,11 @@ static void Generic_Core_Counters_Set(union SAVE_AREA_CORE *Save, CORE_RO *Core)
36643637
"str x12 , %[PMCR]" "\n\t"
36653638
"mov x12 , %[CTRL]" "\n\t"
36663639
"msr pmcr_el0, x12" "\n\t"
3640+
"isb" "\n\t"
3641+
3642+
"# Writing 1 to PMCR_EL0.C sets CCNT to 0\n\t"
3643+
"mov x12 , #1" "\n\t"
3644+
"msr pmccntr_el0, x12" "\n\t"
36673645
"isb"
36683646
: [PMCR] "+m" (Save->PMCR.value),
36693647
[PMSELR] "+m" (Save->PMSELR.value),
@@ -3683,6 +3661,28 @@ static void Generic_Core_Counters_Set(union SAVE_AREA_CORE *Save, CORE_RO *Core)
36833661
[CTRL] "i" (0x87LLU)
36843662
: "memory", "%x12"
36853663
);
3664+
if (Core->Bind == PUBLIC(RO(Proc))->Service.Core) {
3665+
volatile PMUSERENR pmuser;
3666+
volatile PMCNTENSET enset;
3667+
volatile unsigned long long ccntr, icntr;
3668+
__asm__ __volatile__(
3669+
"mrs %[pmuser], pmuserenr_el0" "\n\t"
3670+
"mrs %[enset], pmcntenset_el0" "\n\t"
3671+
"mrs %[ccntr], pmccntr_el0" "\n\t"
3672+
"mrs %[icntr], pmevcntr3_el0" "\n\t"
3673+
"isb"
3674+
: [pmuser] "=r" (pmuser.value),
3675+
[enset] "=r" (enset.value),
3676+
[ccntr] "=r" (ccntr),
3677+
[icntr] "=r" (icntr)
3678+
:
3679+
: "memory"
3680+
);
3681+
PUBLIC(RO(Proc))->Features.PerfMon.CoreCycles = (pmuser.CR
3682+
| enset.C)
3683+
&& (ccntr > 0);
3684+
PUBLIC(RO(Proc))->Features.PerfMon.InstrRetired = (icntr > 0);
3685+
}
36863686
}
36873687
}
36883688

@@ -3754,11 +3754,9 @@ static void Generic_Core_Counters_Clear(union SAVE_AREA_CORE *Save,
37543754
\
37553755
Core->Counter[T].INST &= INST_COUNTER_OVERFLOW; \
37563756
/* Normalize frequency: */ \
3757-
Core->Counter[T].C1 = ( \
3758-
Core->Counter[T].TSC \
3759-
* PUBLIC(RO(Proc))->Features.Factory.Clock.Q \
3760-
* Core->Boost[BOOST(MAX)].Q \
3761-
) / PUBLIC(RO(Proc))->Features.Factory.Ratio; \
3757+
Core->Counter[T].C1 = \
3758+
(Core->Counter[T].TSC * Core->Boost[BOOST(MAX)].Q) \
3759+
+ ((Core->Counter[T].TSC * (Core->Boost[BOOST(MAX)].R)) >> 16); \
37623760
/* Derive C1: */ \
37633761
Core->Counter[T].C1 = \
37643762
(Core->Counter[T].C1 > Core->Counter[T].C0.URC) ? \

‎ppc64le/corefreq-cli.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8104,10 +8104,9 @@ void Pkg_Fmt_Freq( ASCII *item, ASCII *code, CLOCK *clock,
81048104
code, RSC(AUTOMATIC).CODE(),
81058105
unlock ? '<' : '[', ratio.Q, unlock ? '>' : ']');
81068106
} else {
8107-
const CLOCK clk = {.Q = clock->Q, .R = clock->R, .Hz = clock->Hz};
81088107
StrFormat(item, RSZ(CREATE_SELECT_FREQ_OFFLINE)+9+10+1,
81098108
"%s" "%7.2f MHz %c%4u %c ",
8110-
code, CLOCK_MHz(double, COF_FREQ_MHz(ratio, clk)),
8109+
code, CLOCK_MHz(double, COF_FREQ_MHz(ratio, (*clock))),
81118110
unlock ? '<' : '[', ratio.Q, unlock ? '>' : ']');
81128111
}
81138112
}

‎ppc64le/corefreqk.c‎

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1110,13 +1110,10 @@ static unsigned long GetVoltage_From_OPP(unsigned int cpu,
11101110

11111111
static void Store_Voltage_Identifier (unsigned int cpu,
11121112
enum RATIO_BOOST boost,
1113-
unsigned long kHz )
1113+
unsigned long freq_Hz )
11141114
{
1115-
if (kHz > 0) {
1116-
unsigned long freq_Hz = 1000LU * kHz,
1117-
1118-
u_volt = GetVoltage_From_OPP(cpu, freq_Hz);
1119-
u_volt = u_volt >> 5;
1115+
if (freq_Hz > 0) {
1116+
unsigned long u_volt = GetVoltage_From_OPP(cpu, freq_Hz) >> 5;
11201117

11211118
PRIVATE(OF(Core, AT(cpu)))->OPP[boost].VID = (signed int) u_volt;
11221119
}

‎riscv64/corefreq-cli.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8709,10 +8709,9 @@ void Pkg_Fmt_Freq( ASCII *item, ASCII *code, CLOCK *clock,
87098709
code, RSC(AUTOMATIC).CODE(),
87108710
unlock ? '<' : '[', ratio.Q, unlock ? '>' : ']');
87118711
} else {
8712-
const CLOCK clk = {.Q = clock->Q, .R = clock->R, .Hz = clock->Hz};
87138712
StrFormat(item, RSZ(CREATE_SELECT_FREQ_OFFLINE)+9+10+1,
87148713
"%s" "%7.2f MHz %c%4u %c ",
8715-
code, CLOCK_MHz(double, COF_FREQ_MHz(ratio, clk)),
8714+
code, CLOCK_MHz(double, COF_FREQ_MHz(ratio, (*clock))),
87168715
unlock ? '<' : '[', ratio.Q, unlock ? '>' : ']');
87178716
}
87188717
}

‎riscv64/corefreqk.c‎

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1117,13 +1117,10 @@ static unsigned long GetVoltage_From_OPP(unsigned int cpu,
11171117

11181118
static void Store_Voltage_Identifier (unsigned int cpu,
11191119
enum RATIO_BOOST boost,
1120-
unsigned long kHz )
1120+
unsigned long freq_Hz )
11211121
{
1122-
if (kHz > 0) {
1123-
unsigned long freq_Hz = 1000LU * kHz,
1124-
1125-
u_volt = GetVoltage_From_OPP(cpu, freq_Hz);
1126-
u_volt = u_volt >> 5;
1122+
if (freq_Hz > 0) {
1123+
unsigned long u_volt = GetVoltage_From_OPP(cpu, freq_Hz) >> 5;
11271124

11281125
PRIVATE(OF(Core, AT(cpu)))->OPP[boost].VID = (signed int) u_volt;
11291126
}

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