Skip to content

Commit 0cb1a8e

Browse files
Update Memory.scala
1 parent cfc51fb commit 0cb1a8e

1 file changed

Lines changed: 2 additions & 2 deletions

File tree

src/main/scala/RISCV/Memory.scala

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,15 +33,15 @@ class Memory() extends Module {
3333
io.read_value_2 := 0.U
3434

3535
val isVGA = io.address_1 >= 0b1000000000000.U;
36-
io.address_vga := Mux(isVGA, io.address_1 - 0b1000000000000.U, 0.U);
36+
io.address_vga := Mux(isVGA, io.address_1 / 0b1000000000000.U - 1.U, 0.U);
3737
io.write_vga := isVGA && io.write_1
3838
io.write_value_vga := io.write_value_1
3939

4040
when(io.write_1) {
4141
when(isVGA) {
4242
printf(
4343
"Writing to VGA! Address: %b Data: %b\n",
44-
io.address_1 - 0b1000000000000.U,
44+
io.address_1 / 0b1000000000000.U - 1.U,
4545
io.write_value_1
4646
);
4747
}.otherwise {

0 commit comments

Comments
 (0)