From 70f30823ee8127d071f3a7e6a3d940e600ac5412 Mon Sep 17 00:00:00 2001 From: Alingof Date: Tue, 4 Feb 2025 13:13:08 +0900 Subject: [PATCH 1/7] [add] add instruction/zbb_exntnsion.rs --- src/instruction.rs | 6 ++ src/instruction/zbb_extension.rs | 143 +++++++++++++++++++++++++++++++ src/lib.rs | 6 +- 3 files changed, 153 insertions(+), 2 deletions(-) create mode 100644 src/instruction/zbb_extension.rs diff --git a/src/instruction.rs b/src/instruction.rs index e96591b..b8a8dbf 100644 --- a/src/instruction.rs +++ b/src/instruction.rs @@ -5,6 +5,7 @@ pub mod base_i; pub mod c_extension; pub mod m_extension; pub mod priv_extension; +pub mod zbb_extension; pub mod zicboz_extension; pub mod zicfiss_extension; pub mod zicntr_extension; @@ -18,6 +19,7 @@ use base_i::BaseIOpcode; use c_extension::COpcode; use m_extension::MOpcode; use priv_extension::PrivOpcode; +use zbb_extension::ZbbOpcode; use zicboz_extension::ZicbozOpcode; use zicfiss_extension::ZicfissOpcode; use zicntr_extension::ZicntrOpcode; @@ -446,6 +448,8 @@ pub enum OpcodeKind { A(AOpcode), /// Compressed Instructions C(COpcode), + /// Basic bit manipulation + Zbb(ZbbOpcode), /// Instruction-Fetch Fence, Zifencei(ZifenceiOpcode), /// Cache-Block Zero Instructions @@ -467,6 +471,7 @@ impl Display for OpcodeKind { Self::M(opc) => write!(f, "{opc}"), Self::A(opc) => write!(f, "{opc}"), Self::C(opc) => write!(f, "{opc}"), + Self::Zbb(opc) => write!(f, "{opc}"), Self::Zifencei(opc) => write!(f, "{opc}"), Self::Zicboz(opc) => write!(f, "{opc}"), Self::Zicsr(opc) => write!(f, "{opc}"), @@ -485,6 +490,7 @@ impl OpcodeKind { Self::M(opc) => opc.get_format(), Self::A(opc) => opc.get_format(), Self::C(opc) => opc.get_format(), + Self::Zbb(opc) => opc.get_format(), Self::Zifencei(opc) => opc.get_format(), Self::Zicboz(opc) => opc.get_format(), Self::Zicsr(opc) => opc.get_format(), diff --git a/src/instruction/zbb_extension.rs b/src/instruction/zbb_extension.rs new file mode 100644 index 0000000..7674c01 --- /dev/null +++ b/src/instruction/zbb_extension.rs @@ -0,0 +1,143 @@ +//! Zbb extension Instruction + +use super::{InstFormat, Opcode}; +use core::fmt::{self, Display, Formatter}; + +/// Insturctions in Zbb Extension. +#[allow(non_camel_case_types, clippy::upper_case_acronyms)] +#[derive(Debug, PartialEq)] +pub enum ZbbOpcode { + /// TODO: Add a description of the instruction here. + RORIW, + + /// TODO: Add a description of the instruction here. + RORI, + + /// TODO: Add a description of the instruction here. + ROLW, + + /// TODO: Add a description of the instruction here. + RORW, + + /// TODO: Add a description of the instruction here. + ANDN, + + /// TODO: Add a description of the instruction here. + ORN, + + /// TODO: Add a description of the instruction here. + XNOR, + + /// TODO: Add a description of the instruction here. + MAX, + + /// TODO: Add a description of the instruction here. + MAXU, + + /// TODO: Add a description of the instruction here. + MIN, + + /// TODO: Add a description of the instruction here. + MINU, + + /// TODO: Add a description of the instruction here. + ROL, + + /// TODO: Add a description of the instruction here. + ROR, + + /// TODO: Add a description of the instruction here. + SEXTB, + + /// TODO: Add a description of the instruction here. + SEXTH, + + /// TODO: Add a description of the instruction here. + ZEXTH, + + /// TODO: Add a description of the instruction here. + REV8, + + /// TODO: Add a description of the instruction here. + ORCB, + + /// TODO: Add a description of the instruction here. + CPOP, + + /// TODO: Add a description of the instruction here. + CPOPW, + + /// TODO: Add a description of the instruction here. + CLZ, + + /// TODO: Add a description of the instruction here. + CLZW, + + /// TODO: Add a description of the instruction here. + CTZ, + + /// TODO: Add a description of the instruction here. + CTZW, +} + +impl Display for ZbbOpcode { + fn fmt(&self, f: &mut Formatter) -> fmt::Result { + match self { + ZbbOpcode::RORIW => write!(f, "roriw"), + ZbbOpcode::RORI => write!(f, "rori"), + ZbbOpcode::ROLW => write!(f, "rolw"), + ZbbOpcode::RORW => write!(f, "rorw"), + ZbbOpcode::ANDN => write!(f, "andn"), + ZbbOpcode::ORN => write!(f, "orn"), + ZbbOpcode::XNOR => write!(f, "xnor"), + ZbbOpcode::MAX => write!(f, "max"), + ZbbOpcode::MAXU => write!(f, "maxu"), + ZbbOpcode::MIN => write!(f, "min"), + ZbbOpcode::MINU => write!(f, "minu"), + ZbbOpcode::ROL => write!(f, "rol"), + ZbbOpcode::ROR => write!(f, "ror"), + ZbbOpcode::SEXTB => write!(f, "sextb"), + ZbbOpcode::SEXTH => write!(f, "sexth"), + ZbbOpcode::ZEXTH => write!(f, "zexth"), + ZbbOpcode::REV8 => write!(f, "rev8"), + ZbbOpcode::ORCB => write!(f, "orcb"), + ZbbOpcode::CPOP => write!(f, "cpop"), + ZbbOpcode::CPOPW => write!(f, "cpopw"), + ZbbOpcode::CLZ => write!(f, "clz"), + ZbbOpcode::CLZW => write!(f, "clzw"), + ZbbOpcode::CTZ => write!(f, "ctz"), + ZbbOpcode::CTZW => write!(f, "ctzw"), + } + } +} + +impl Opcode for ZbbOpcode { + fn get_format(&self) -> InstFormat { + match self { + ZbbOpcode::RORIW => InstFormat::RFormat, + ZbbOpcode::RORI => InstFormat::RFormat, + ZbbOpcode::ROLW => InstFormat::RFormat, + ZbbOpcode::RORW => InstFormat::RFormat, + ZbbOpcode::ANDN => InstFormat::RFormat, + ZbbOpcode::ORN => InstFormat::RFormat, + ZbbOpcode::XNOR => InstFormat::RFormat, + ZbbOpcode::MAX => InstFormat::RFormat, + ZbbOpcode::MAXU => InstFormat::RFormat, + ZbbOpcode::MIN => InstFormat::RFormat, + ZbbOpcode::MINU => InstFormat::RFormat, + ZbbOpcode::ROL => InstFormat::RFormat, + ZbbOpcode::ROR => InstFormat::RFormat, + ZbbOpcode::SEXTB => InstFormat::RShamtFormat, + ZbbOpcode::SEXTH => InstFormat::RShamtFormat, + ZbbOpcode::ZEXTH => InstFormat::RShamtFormat, + ZbbOpcode::REV8 => InstFormat::RShamtFormat, + ZbbOpcode::ORCB => InstFormat::RShamtFormat, + ZbbOpcode::CPOP => InstFormat::RShamtFormat, + ZbbOpcode::CPOPW => InstFormat::RShamtFormat, + ZbbOpcode::CLZ => InstFormat::RShamtFormat, + ZbbOpcode::CLZW => InstFormat::RShamtFormat, + ZbbOpcode::CTZ => InstFormat::RShamtFormat, + ZbbOpcode::CTZW => InstFormat::RShamtFormat, + } + } +} diff --git a/src/lib.rs b/src/lib.rs index 931c6c4..ba23697 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -33,8 +33,8 @@ mod instruction; pub use crate::decode::{Decode, DecodingError}; pub use crate::instruction::{ a_extension::AOpcode, base_i::BaseIOpcode, c_extension::COpcode, m_extension::MOpcode, - priv_extension::PrivOpcode, zicboz_extension::ZicbozOpcode, zicfiss_extension::ZicfissOpcode, - zicntr_extension::ZicntrOpcode, zicsr_extension::ZicsrOpcode, + priv_extension::PrivOpcode, zbb_extension::ZbbOpcode, zicboz_extension::ZicbozOpcode, + zicfiss_extension::ZicfissOpcode, zicntr_extension::ZicntrOpcode, zicsr_extension::ZicsrOpcode, zifencei_extension::ZifenceiOpcode, InstFormat, Instruction, OpcodeKind, }; @@ -58,6 +58,8 @@ enum Extensions { A, /// Compressed Instructions C, + /// Basic bit manipulation + Zbb, /// Instruction-Fetch Fence Zifencei, /// Cache-Block Zero Instructions From c3d594ad1bf9978f09cc1964a82901b7a6e5c875 Mon Sep 17 00:00:00 2001 From: Alingof Date: Tue, 4 Feb 2025 13:13:25 +0900 Subject: [PATCH 2/7] [add] add decode/zbb_exntnsion.rs --- src/decode.rs | 1 + src/decode/inst_32.rs | 13 +- src/decode/zbb_extension.rs | 443 ++++++++++++++++++++++++++++++++++++ 3 files changed, 455 insertions(+), 2 deletions(-) create mode 100644 src/decode/zbb_extension.rs diff --git a/src/decode.rs b/src/decode.rs index 7c05a47..cca6d77 100644 --- a/src/decode.rs +++ b/src/decode.rs @@ -8,6 +8,7 @@ mod base_i; mod c_extension; mod m_extension; mod priv_extension; +mod zbb_extension; mod zicboz_extension; mod zicfiss_extension; mod zicntr_extension; diff --git a/src/decode/inst_32.rs b/src/decode/inst_32.rs index c176267..784b8f4 100644 --- a/src/decode/inst_32.rs +++ b/src/decode/inst_32.rs @@ -1,6 +1,6 @@ use super::{ - a_extension, base_i, m_extension, priv_extension, zicboz_extension, zicfiss_extension, - zicntr_extension, zicsr_extension, zifencei_extension, + a_extension, base_i, m_extension, priv_extension, zbb_extension, zicboz_extension, + zicfiss_extension, zicntr_extension, zicsr_extension, zifencei_extension, }; use super::{Decode, DecodeUtil, DecodingError}; use crate::instruction::{InstFormat, Instruction, OpcodeKind}; @@ -42,6 +42,7 @@ impl Decode for u32 { Ok(Extensions::Zicsr) => Ok(OpcodeKind::Zicsr(zicsr_extension::bit_32::parse_opcode( self, )?)), + Ok(Extensions::Zbb) => Ok(OpcodeKind::Zbb(zbb_extension::bit_32::parse_opcode(self)?)), Ok(Extensions::Zicfiss) => Ok(OpcodeKind::Zicfiss( zicfiss_extension::bit_32::parse_opcode(self)?, )), @@ -64,6 +65,7 @@ impl Decode for u32 { OpcodeKind::BaseI(opc) => Ok(base_i::bit_32::parse_rd(self, opc)), OpcodeKind::M(opc) => Ok(m_extension::bit_32::parse_rd(self, opc)), OpcodeKind::A(opc) => Ok(a_extension::bit_32::parse_rd(self, opc)), + OpcodeKind::Zbb(opc) => Ok(zbb_extension::bit_32::parse_rd(self, opc)), OpcodeKind::Zifencei(opc) => Ok(zifencei_extension::bit_32::parse_rd(self, opc)), OpcodeKind::Zicsr(opc) => Ok(zicsr_extension::bit_32::parse_rd(self, opc)), OpcodeKind::Zicfiss(opc) => Ok(zicfiss_extension::bit_32::parse_rd(self, opc)), @@ -79,6 +81,7 @@ impl Decode for u32 { OpcodeKind::BaseI(opc) => Ok(base_i::bit_32::parse_rs1(self, opc)), OpcodeKind::M(opc) => Ok(m_extension::bit_32::parse_rs1(self, opc)), OpcodeKind::A(opc) => Ok(a_extension::bit_32::parse_rs1(self, opc)), + OpcodeKind::Zbb(opc) => Ok(zbb_extension::bit_32::parse_rs1(self, opc)), OpcodeKind::Zifencei(opc) => Ok(zifencei_extension::bit_32::parse_rs1(self, opc)), OpcodeKind::Zicsr(opc) => Ok(zicsr_extension::bit_32::parse_rs1(self, opc)), OpcodeKind::Zicfiss(opc) => Ok(zicfiss_extension::bit_32::parse_rs1(self, opc)), @@ -94,6 +97,7 @@ impl Decode for u32 { OpcodeKind::BaseI(opc) => Ok(base_i::bit_32::parse_rs2(self, opc)), OpcodeKind::M(opc) => Ok(m_extension::bit_32::parse_rs2(self, opc)), OpcodeKind::A(opc) => Ok(a_extension::bit_32::parse_rs2(self, opc)), + OpcodeKind::Zbb(opc) => Ok(zbb_extension::bit_32::parse_rs2(self, opc)), OpcodeKind::Zifencei(opc) => Ok(zifencei_extension::bit_32::parse_rs2(self, opc)), OpcodeKind::Zicsr(opc) => Ok(zicsr_extension::bit_32::parse_rs2(self, opc)), OpcodeKind::Zicfiss(opc) => Ok(zicfiss_extension::bit_32::parse_rs2(self, opc)), @@ -109,6 +113,7 @@ impl Decode for u32 { OpcodeKind::BaseI(opc) => Ok(base_i::bit_32::parse_imm(self, opc, isa)), OpcodeKind::M(opc) => Ok(m_extension::bit_32::parse_imm(self, opc)), OpcodeKind::A(opc) => Ok(a_extension::bit_32::parse_imm(self, opc)), + OpcodeKind::Zbb(opc) => Ok(zbb_extension::bit_32::parse_imm(self, opc)), OpcodeKind::Zifencei(opc) => Ok(zifencei_extension::bit_32::parse_imm(self, opc)), OpcodeKind::Zicsr(opc) => Ok(zicsr_extension::bit_32::parse_imm(self, opc)), OpcodeKind::Zicfiss(opc) => Ok(zicfiss_extension::bit_32::parse_imm(self, opc)), @@ -139,6 +144,8 @@ impl DecodeUtil for u32 { 0b010 => Ok(Extensions::Zicboz), _ => Err(DecodingError::UnknownExtension), }, + 0b001_0011 => Ok(Extensions::Zbb), + 0b001_1011 => Ok(Extensions::Zbb), 0b010_1111 => match funct5 { 0b00000 | 0b00001 | 0b00010 | 0b00011 | 0b00100 | 0b01000 | 0b01100 | 0b10000 | 0b10100 | 0b11000 | 0b11100 => Ok(Extensions::A), @@ -147,11 +154,13 @@ impl DecodeUtil for u32 { }, 0b011_0011 => match funct7 { 0b000_0001 => Ok(Extensions::M), + 0b010_0000 | 0b000_0101 | 0b011_0000 => Ok(Extensions::Zbb), _ => Ok(Extensions::BaseI), }, 0b011_1011 => match funct7 { 0b000_0000 | 0b010_0000 => Ok(Extensions::BaseI), 0b000_0001 => Ok(Extensions::M), + 0b011_0000 => Ok(Extensions::Zbb), _ => Err(DecodingError::UnknownExtension), }, 0b111_0011 => match funct3 { diff --git a/src/decode/zbb_extension.rs b/src/decode/zbb_extension.rs new file mode 100644 index 0000000..4a504dd --- /dev/null +++ b/src/decode/zbb_extension.rs @@ -0,0 +1,443 @@ +//! Zbb extension decoder + +pub mod bit_32 { + use super::super::{DecodeUtil, DecodingError}; + use crate::instruction::zbb_extension::ZbbOpcode; + + pub fn parse_opcode(inst: u32) -> Result { + let op_6_0: u8 = u8::try_from(inst.slice(6, 0)).unwrap(); + let op_14_12: u8 = u8::try_from(inst.slice(14, 12)).unwrap(); + let op_31_20: u16 = u16::try_from(inst.slice(31, 20)).unwrap(); + let op_24_20: u8 = u8::try_from(inst.slice(24, 20)).unwrap(); + let op_31_25: u8 = u8::try_from(inst.slice(31, 25)).unwrap(); + let op_31_26: u8 = u8::try_from(inst.slice(31, 26)).unwrap(); + match op_6_0 { + 0b111011 => match op_14_12 { + 0b1 => Ok(ZbbOpcode::ROLW), + 0b101 => Ok(ZbbOpcode::RORW), + 0b100 => Ok(ZbbOpcode::ZEXTH), + _ => Err(DecodingError::InvalidOpcode), + }, + 0b11011 => match op_14_12 { + 0b101 => Ok(ZbbOpcode::RORIW), + 0b1 => match op_31_20 { + 0b11000000001 => Ok(ZbbOpcode::CTZW), + 0b11000000010 => Ok(ZbbOpcode::CPOPW), + 0b11000000000 => Ok(ZbbOpcode::CLZW), + _ => Err(DecodingError::InvalidOpcode), + }, + _ => Err(DecodingError::InvalidOpcode), + }, + 0b10011 => match op_14_12 { + 0b101 => match op_31_20 { + 0b11010011000 => Ok(ZbbOpcode::REV8), + 0b1010000111 => Ok(ZbbOpcode::ORCB), + _ => Ok(ZbbOpcode::RORI), + 0b11010111000 => Ok(ZbbOpcode::REV8), + }, + 0b1 => match op_31_20 { + 0b11000000000 => Ok(ZbbOpcode::CLZ), + 0b11000000001 => Ok(ZbbOpcode::CTZ), + 0b11000000010 => Ok(ZbbOpcode::CPOP), + _ => match op_24_20 { + 0b100 => Ok(ZbbOpcode::SEXTB), + 0b101 => Ok(ZbbOpcode::SEXTH), + _ => Err(DecodingError::InvalidOpcode), + }, + }, + _ => Err(DecodingError::InvalidOpcode), + }, + 0b110011 => match op_14_12 { + 0b1 => Ok(ZbbOpcode::ROL), + 0b110 => match op_31_25 { + 0b100000 => Ok(ZbbOpcode::ORN), + 0b0101 => Ok(ZbbOpcode::MAX), + _ => Err(DecodingError::InvalidOpcode), + }, + 0b101 => match op_31_25 { + 0b0101 => Ok(ZbbOpcode::MINU), + 0b110000 => Ok(ZbbOpcode::ROR), + _ => Err(DecodingError::InvalidOpcode), + }, + 0b111 => match op_31_25 { + 0b100000 => Ok(ZbbOpcode::ANDN), + 0b0101 => Ok(ZbbOpcode::MAXU), + _ => Err(DecodingError::InvalidOpcode), + }, + 0b100 => match op_24_20 { + 0b00 => Ok(ZbbOpcode::ZEXTH), + _ => match op_31_25 { + 0b0101 => Ok(ZbbOpcode::MIN), + 0b100000 => Ok(ZbbOpcode::XNOR), + _ => Err(DecodingError::InvalidOpcode), + }, + }, + _ => Err(DecodingError::InvalidOpcode), + }, + _ => Err(DecodingError::InvalidOpcode), + } + } + + /// Parsing Zbb instruction's rd + pub fn parse_rd(inst: u32, opkind: &ZbbOpcode) -> Option { + let rd_11_7: usize = inst.slice(11, 7) as usize; + match opkind { + ZbbOpcode::RORIW => Some(rd_11_7), + ZbbOpcode::RORI => Some(rd_11_7), + ZbbOpcode::ROLW => Some(rd_11_7), + ZbbOpcode::RORW => Some(rd_11_7), + ZbbOpcode::ANDN => Some(rd_11_7), + ZbbOpcode::ORN => Some(rd_11_7), + ZbbOpcode::XNOR => Some(rd_11_7), + ZbbOpcode::MAX => Some(rd_11_7), + ZbbOpcode::MAXU => Some(rd_11_7), + ZbbOpcode::MIN => Some(rd_11_7), + ZbbOpcode::MINU => Some(rd_11_7), + ZbbOpcode::ROL => Some(rd_11_7), + ZbbOpcode::ROR => Some(rd_11_7), + ZbbOpcode::SEXTB => Some(rd_11_7), + ZbbOpcode::SEXTH => Some(rd_11_7), + ZbbOpcode::ZEXTH => Some(rd_11_7), + ZbbOpcode::ZEXTH => Some(rd_11_7), + ZbbOpcode::REV8 => Some(rd_11_7), + ZbbOpcode::REV8 => Some(rd_11_7), + ZbbOpcode::ORCB => Some(rd_11_7), + ZbbOpcode::CPOP => Some(rd_11_7), + ZbbOpcode::CPOPW => Some(rd_11_7), + ZbbOpcode::CLZ => Some(rd_11_7), + ZbbOpcode::CLZW => Some(rd_11_7), + ZbbOpcode::CTZ => Some(rd_11_7), + ZbbOpcode::CTZW => Some(rd_11_7), + } + } + + /// Parsing Zbb instruction's rs1 + pub fn parse_rs1(inst: u32, opkind: &ZbbOpcode) -> Option { + let rs1_19_15: usize = inst.slice(19, 15) as usize; + match opkind { + ZbbOpcode::RORIW => Some(rs1_19_15), + ZbbOpcode::RORI => Some(rs1_19_15), + ZbbOpcode::ROLW => Some(rs1_19_15), + ZbbOpcode::RORW => Some(rs1_19_15), + ZbbOpcode::ANDN => Some(rs1_19_15), + ZbbOpcode::ORN => Some(rs1_19_15), + ZbbOpcode::XNOR => Some(rs1_19_15), + ZbbOpcode::MAX => Some(rs1_19_15), + ZbbOpcode::MAXU => Some(rs1_19_15), + ZbbOpcode::MIN => Some(rs1_19_15), + ZbbOpcode::MINU => Some(rs1_19_15), + ZbbOpcode::ROL => Some(rs1_19_15), + ZbbOpcode::ROR => Some(rs1_19_15), + ZbbOpcode::SEXTB => Some(rs1_19_15), + ZbbOpcode::SEXTH => Some(rs1_19_15), + ZbbOpcode::ZEXTH => Some(rs1_19_15), + ZbbOpcode::ZEXTH => Some(rs1_19_15), + ZbbOpcode::REV8 => Some(rs1_19_15), + ZbbOpcode::REV8 => Some(rs1_19_15), + ZbbOpcode::ORCB => Some(rs1_19_15), + ZbbOpcode::CPOP => Some(rs1_19_15), + ZbbOpcode::CPOPW => Some(rs1_19_15), + ZbbOpcode::CLZ => Some(rs1_19_15), + ZbbOpcode::CLZW => Some(rs1_19_15), + ZbbOpcode::CTZ => Some(rs1_19_15), + ZbbOpcode::CTZW => Some(rs1_19_15), + } + } + + /// Parsing Zbb instruction's rs2 + pub fn parse_rs2(inst: u32, opkind: &ZbbOpcode) -> Option { + let rs2_24_20: usize = inst.slice(24, 20) as usize; + match opkind { + ZbbOpcode::RORIW => None, + ZbbOpcode::RORI => None, + ZbbOpcode::ROLW => Some(rs2_24_20), + ZbbOpcode::RORW => Some(rs2_24_20), + ZbbOpcode::ANDN => Some(rs2_24_20), + ZbbOpcode::ORN => Some(rs2_24_20), + ZbbOpcode::XNOR => Some(rs2_24_20), + ZbbOpcode::MAX => Some(rs2_24_20), + ZbbOpcode::MAXU => Some(rs2_24_20), + ZbbOpcode::MIN => Some(rs2_24_20), + ZbbOpcode::MINU => Some(rs2_24_20), + ZbbOpcode::ROL => Some(rs2_24_20), + ZbbOpcode::ROR => Some(rs2_24_20), + ZbbOpcode::SEXTB => None, + ZbbOpcode::SEXTH => None, + ZbbOpcode::ZEXTH => None, + ZbbOpcode::ZEXTH => None, + ZbbOpcode::REV8 => None, + ZbbOpcode::REV8 => None, + ZbbOpcode::ORCB => None, + ZbbOpcode::CPOP => None, + ZbbOpcode::CPOPW => None, + ZbbOpcode::CLZ => None, + ZbbOpcode::CLZW => None, + ZbbOpcode::CTZ => None, + ZbbOpcode::CTZW => None, + } + } + + /// Parsing Zbb instruction's imm + pub fn parse_imm(inst: u32, opkind: &ZbbOpcode) -> Option { + match opkind { + ZbbOpcode::RORIW => None, + ZbbOpcode::RORI => None, + ZbbOpcode::ROLW => None, + ZbbOpcode::RORW => None, + ZbbOpcode::ANDN => None, + ZbbOpcode::ORN => None, + ZbbOpcode::XNOR => None, + ZbbOpcode::MAX => None, + ZbbOpcode::MAXU => None, + ZbbOpcode::MIN => None, + ZbbOpcode::MINU => None, + ZbbOpcode::ROL => None, + ZbbOpcode::ROR => None, + ZbbOpcode::SEXTB => None, + ZbbOpcode::SEXTH => None, + ZbbOpcode::ZEXTH => None, + ZbbOpcode::ZEXTH => None, + ZbbOpcode::REV8 => None, + ZbbOpcode::REV8 => None, + ZbbOpcode::ORCB => None, + ZbbOpcode::CPOP => None, + ZbbOpcode::CPOPW => None, + ZbbOpcode::CLZ => None, + ZbbOpcode::CLZW => None, + ZbbOpcode::CTZ => None, + ZbbOpcode::CTZW => None, + } + } +} +#[cfg(test)] +#[allow(unused_variables)] +mod test_zbb { + #[test] + #[allow(overflowing_literals)] + fn zbb_32bit_decode_test() { + use crate::instruction::zbb_extension::ZbbOpcode; + use crate::{Decode, Isa, OpcodeKind}; + + let test_32 = |inst_32: u32, + expected_op: OpcodeKind, + expected_rd: Option, + expected_rs1: Option, + expected_rs2: Option, + expected_imm: Option| { + let op_32 = inst_32.parse_opcode(Isa::Rv64).unwrap(); + assert_eq!(op_32, expected_op); + assert_eq!(inst_32.parse_rd(&op_32).unwrap(), expected_rd); + assert_eq!(inst_32.parse_rs1(&op_32).unwrap(), expected_rs1); + assert_eq!(inst_32.parse_rs2(&op_32).unwrap(), expected_rs2); + assert_eq!(inst_32.parse_imm(&op_32, Isa::Rv64).unwrap(), expected_imm); + }; + test_32( + 0b000001101100010101101010110000, + OpcodeKind::Zbb(ZbbOpcode::RORIW), + Some(0), + Some(6), + None, + Some(10), + ); + test_32( + 0b000001001110110111100111011000, + OpcodeKind::Zbb(ZbbOpcode::RORI), + Some(10), + Some(14), + None, + Some(14), + ); + test_32( + 0b000011101111110101100110110000, + OpcodeKind::Zbb(ZbbOpcode::ROLW), + Some(15), + Some(6), + Some(6), + None, + ); + test_32( + 0b000011101100110111000011110000, + OpcodeKind::Zbb(ZbbOpcode::RORW), + Some(2), + Some(12), + Some(3), + None, + ); + test_32( + 0b000011001111011111000111100000, + OpcodeKind::Zbb(ZbbOpcode::ANDN), + Some(12), + Some(12), + Some(7), + None, + ); + test_32( + 0b000011001100011010010000100000, + OpcodeKind::Zbb(ZbbOpcode::ORN), + Some(1), + Some(9), + Some(0), + None, + ); + test_32( + 0b000011001111110010111110100000, + OpcodeKind::Zbb(ZbbOpcode::XNOR), + Some(15), + Some(11), + Some(14), + None, + ); + test_32( + 0b000011001111011000111011000101, + OpcodeKind::Zbb(ZbbOpcode::MAX), + Some(13), + Some(3), + Some(11), + None, + ); + test_32( + 0b000011001101011101001000000101, + OpcodeKind::Zbb(ZbbOpcode::MAXU), + Some(4), + Some(4), + Some(8), + None, + ); + test_32( + 0b000011001100010000100101000101, + OpcodeKind::Zbb(ZbbOpcode::MIN), + Some(0), + Some(2), + Some(5), + None, + ); + test_32( + 0b000011001110110101101100000101, + OpcodeKind::Zbb(ZbbOpcode::MINU), + Some(11), + Some(6), + Some(12), + None, + ); + test_32( + 0b000011001111000100110111110000, + OpcodeKind::Zbb(ZbbOpcode::ROL), + Some(12), + Some(3), + Some(7), + None, + ); + test_32( + 0b000011001101010110100010110000, + OpcodeKind::Zbb(ZbbOpcode::ROR), + Some(5), + Some(10), + Some(2), + None, + ); + test_32( + 0b000001001110010101100100110000, + OpcodeKind::Zbb(ZbbOpcode::SEXTB), + Some(9), + Some(6), + None, + None, + ); + test_32( + 0b000001001100000101100101110000, + OpcodeKind::Zbb(ZbbOpcode::SEXTH), + Some(0), + Some(6), + None, + None, + ); + test_32( + 0b000011001100110010100000000100, + OpcodeKind::Zbb(ZbbOpcode::ZEXTH), + Some(2), + Some(10), + None, + None, + ); + test_32( + 0b000011101111010011010000000100, + OpcodeKind::Zbb(ZbbOpcode::ZEXTH), + Some(13), + Some(13), + None, + None, + ); + test_32( + 0b000010011001101001011010011000, + OpcodeKind::Zbb(ZbbOpcode::REV8), + Some(2), + Some(2), + None, + None, + ); + test_32( + 0b000010011111101011111010111000, + OpcodeKind::Zbb(ZbbOpcode::REV8), + Some(15), + Some(7), + None, + None, + ); + test_32( + 0b000010011001101001001010000111, + OpcodeKind::Zbb(ZbbOpcode::ORCB), + Some(2), + Some(2), + None, + None, + ); + test_32( + 0b000010011110101010111000000010, + OpcodeKind::Zbb(ZbbOpcode::CPOP), + Some(13), + Some(5), + None, + None, + ); + test_32( + 0b000011011100101010111000000010, + OpcodeKind::Zbb(ZbbOpcode::CPOPW), + Some(9), + Some(5), + None, + None, + ); + test_32( + 0b000010011010001010011000000000, + OpcodeKind::Zbb(ZbbOpcode::CLZ), + Some(4), + Some(4), + None, + None, + ); + test_32( + 0b000011011010001100011000000000, + OpcodeKind::Zbb(ZbbOpcode::CLZW), + Some(4), + Some(8), + None, + None, + ); + test_32( + 0b000010011010101100111000000001, + OpcodeKind::Zbb(ZbbOpcode::CTZ), + Some(5), + Some(9), + None, + None, + ); + test_32( + 0b000011011010101101111000000001, + OpcodeKind::Zbb(ZbbOpcode::CTZW), + Some(5), + Some(11), + None, + None, + ); + } +} From 3cb7014ce333b6c144ccc8c0217f752dbd40062a Mon Sep 17 00:00:00 2001 From: Alingof Date: Sat, 28 Jun 2025 23:49:20 +0900 Subject: [PATCH 3/7] [fix] fix `parse_expansion` --- src/decode/inst_32.rs | 36 +++++++++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) diff --git a/src/decode/inst_32.rs b/src/decode/inst_32.rs index 784b8f4..8e8c5f3 100644 --- a/src/decode/inst_32.rs +++ b/src/decode/inst_32.rs @@ -144,8 +144,14 @@ impl DecodeUtil for u32 { 0b010 => Ok(Extensions::Zicboz), _ => Err(DecodingError::UnknownExtension), }, - 0b001_0011 => Ok(Extensions::Zbb), - 0b001_1011 => Ok(Extensions::Zbb), + 0b001_0011 => match funct3 { + 0b001 | 0b101 => Ok(Extensions::Zbb), + _ => Ok(Extensions::BaseI), + }, + 0b001_1011 => match funct3 { + 0b001 | 0b101 => Ok(Extensions::Zbb), + _ => Ok(Extensions::BaseI), + }, 0b010_1111 => match funct5 { 0b00000 | 0b00001 | 0b00010 | 0b00011 | 0b00100 | 0b01000 | 0b01100 | 0b10000 | 0b10100 | 0b11000 | 0b11100 => Ok(Extensions::A), @@ -154,12 +160,36 @@ impl DecodeUtil for u32 { }, 0b011_0011 => match funct7 { 0b000_0001 => Ok(Extensions::M), - 0b010_0000 | 0b000_0101 | 0b011_0000 => Ok(Extensions::Zbb), + 0b000_0100 => match funct3 { + 0b001 | 0b100 | 0b101 | 0b110 | 0b111 => Ok(Extensions::Zbb), + _ => Ok(Extensions::BaseI), + }, + 0b000_0101 => match funct3 { + 0b001 | 0b010 | 0b100 | 0b101 | 0b110 | 0b011 | 0b111 => Ok(Extensions::Zbb), + _ => Ok(Extensions::BaseI), + }, + 0b001_0100 => match funct3 { + 0b001 => Ok(Extensions::Zbb), + _ => Ok(Extensions::BaseI), + }, + 0b010_0000 => match funct3 { + 0b100 | 0b110 | 0b111 => Ok(Extensions::Zbb), + _ => Ok(Extensions::BaseI), + }, + 0b011_0100 => match funct3 { + 0b001 => Ok(Extensions::Zbb), + _ => Ok(Extensions::BaseI), + }, + 0b011_0000 => match funct3 { + 0b001 | 0b101 => Ok(Extensions::Zbb), + _ => Ok(Extensions::BaseI), + }, _ => Ok(Extensions::BaseI), }, 0b011_1011 => match funct7 { 0b000_0000 | 0b010_0000 => Ok(Extensions::BaseI), 0b000_0001 => Ok(Extensions::M), + 0b000_0100 => Ok(Extensions::Zbb), 0b011_0000 => Ok(Extensions::Zbb), _ => Err(DecodingError::UnknownExtension), }, From a5a91b5b6d0c59fda232c6c3094e3d78a1155456 Mon Sep 17 00:00:00 2001 From: Alingof Date: Sun, 6 Jul 2025 15:39:14 +0900 Subject: [PATCH 4/7] [update] re-generate zbb_extension.rs --- src/decode/zbb_extension.rs | 280 ++++++++++++++++-------------------- 1 file changed, 121 insertions(+), 159 deletions(-) diff --git a/src/decode/zbb_extension.rs b/src/decode/zbb_extension.rs index 4a504dd..cf0d534 100644 --- a/src/decode/zbb_extension.rs +++ b/src/decode/zbb_extension.rs @@ -14,26 +14,25 @@ pub mod bit_32 { match op_6_0 { 0b111011 => match op_14_12 { 0b1 => Ok(ZbbOpcode::ROLW), - 0b101 => Ok(ZbbOpcode::RORW), 0b100 => Ok(ZbbOpcode::ZEXTH), + 0b101 => Ok(ZbbOpcode::RORW), _ => Err(DecodingError::InvalidOpcode), }, 0b11011 => match op_14_12 { 0b101 => Ok(ZbbOpcode::RORIW), 0b1 => match op_31_20 { + 0b11000000000 => Ok(ZbbOpcode::CLZW), 0b11000000001 => Ok(ZbbOpcode::CTZW), 0b11000000010 => Ok(ZbbOpcode::CPOPW), - 0b11000000000 => Ok(ZbbOpcode::CLZW), _ => Err(DecodingError::InvalidOpcode), }, _ => Err(DecodingError::InvalidOpcode), }, 0b10011 => match op_14_12 { 0b101 => match op_31_20 { - 0b11010011000 => Ok(ZbbOpcode::REV8), 0b1010000111 => Ok(ZbbOpcode::ORCB), - _ => Ok(ZbbOpcode::RORI), 0b11010111000 => Ok(ZbbOpcode::REV8), + _ => Ok(ZbbOpcode::RORI), }, 0b1 => match op_31_20 { 0b11000000000 => Ok(ZbbOpcode::CLZ), @@ -49,29 +48,26 @@ pub mod bit_32 { }, 0b110011 => match op_14_12 { 0b1 => Ok(ZbbOpcode::ROL), - 0b110 => match op_31_25 { - 0b100000 => Ok(ZbbOpcode::ORN), - 0b0101 => Ok(ZbbOpcode::MAX), + 0b100 => match op_31_25 { + 0b00101 => Ok(ZbbOpcode::MIN), + 0b100000 => Ok(ZbbOpcode::XNOR), _ => Err(DecodingError::InvalidOpcode), }, 0b101 => match op_31_25 { - 0b0101 => Ok(ZbbOpcode::MINU), + 0b00101 => Ok(ZbbOpcode::MINU), 0b110000 => Ok(ZbbOpcode::ROR), _ => Err(DecodingError::InvalidOpcode), }, + 0b110 => match op_31_25 { + 0b00101 => Ok(ZbbOpcode::MAX), + 0b100000 => Ok(ZbbOpcode::ORN), + _ => Err(DecodingError::InvalidOpcode), + }, 0b111 => match op_31_25 { + 0b00101 => Ok(ZbbOpcode::MAXU), 0b100000 => Ok(ZbbOpcode::ANDN), - 0b0101 => Ok(ZbbOpcode::MAXU), _ => Err(DecodingError::InvalidOpcode), }, - 0b100 => match op_24_20 { - 0b00 => Ok(ZbbOpcode::ZEXTH), - _ => match op_31_25 { - 0b0101 => Ok(ZbbOpcode::MIN), - 0b100000 => Ok(ZbbOpcode::XNOR), - _ => Err(DecodingError::InvalidOpcode), - }, - }, _ => Err(DecodingError::InvalidOpcode), }, _ => Err(DecodingError::InvalidOpcode), @@ -98,8 +94,6 @@ pub mod bit_32 { ZbbOpcode::SEXTB => Some(rd_11_7), ZbbOpcode::SEXTH => Some(rd_11_7), ZbbOpcode::ZEXTH => Some(rd_11_7), - ZbbOpcode::ZEXTH => Some(rd_11_7), - ZbbOpcode::REV8 => Some(rd_11_7), ZbbOpcode::REV8 => Some(rd_11_7), ZbbOpcode::ORCB => Some(rd_11_7), ZbbOpcode::CPOP => Some(rd_11_7), @@ -131,8 +125,6 @@ pub mod bit_32 { ZbbOpcode::SEXTB => Some(rs1_19_15), ZbbOpcode::SEXTH => Some(rs1_19_15), ZbbOpcode::ZEXTH => Some(rs1_19_15), - ZbbOpcode::ZEXTH => Some(rs1_19_15), - ZbbOpcode::REV8 => Some(rs1_19_15), ZbbOpcode::REV8 => Some(rs1_19_15), ZbbOpcode::ORCB => Some(rs1_19_15), ZbbOpcode::CPOP => Some(rs1_19_15), @@ -164,8 +156,6 @@ pub mod bit_32 { ZbbOpcode::SEXTB => None, ZbbOpcode::SEXTH => None, ZbbOpcode::ZEXTH => None, - ZbbOpcode::ZEXTH => None, - ZbbOpcode::REV8 => None, ZbbOpcode::REV8 => None, ZbbOpcode::ORCB => None, ZbbOpcode::CPOP => None, @@ -179,9 +169,11 @@ pub mod bit_32 { /// Parsing Zbb instruction's imm pub fn parse_imm(inst: u32, opkind: &ZbbOpcode) -> Option { + let imm_24_20: i32 = inst.slice(24, 20) as i32; + let imm_25_20: i32 = inst.slice(25, 20) as i32; match opkind { - ZbbOpcode::RORIW => None, - ZbbOpcode::RORI => None, + ZbbOpcode::RORIW => Some(imm_24_20), + ZbbOpcode::RORI => Some(imm_25_20), ZbbOpcode::ROLW => None, ZbbOpcode::RORW => None, ZbbOpcode::ANDN => None, @@ -196,8 +188,6 @@ pub mod bit_32 { ZbbOpcode::SEXTB => None, ZbbOpcode::SEXTH => None, ZbbOpcode::ZEXTH => None, - ZbbOpcode::ZEXTH => None, - ZbbOpcode::REV8 => None, ZbbOpcode::REV8 => None, ZbbOpcode::ORCB => None, ZbbOpcode::CPOP => None, @@ -215,227 +205,199 @@ mod test_zbb { #[test] #[allow(overflowing_literals)] fn zbb_32bit_decode_test() { + use crate::decode::inst_32::test_32_in_rv64; use crate::instruction::zbb_extension::ZbbOpcode; - use crate::{Decode, Isa, OpcodeKind}; + use crate::OpcodeKind; - let test_32 = |inst_32: u32, - expected_op: OpcodeKind, - expected_rd: Option, - expected_rs1: Option, - expected_rs2: Option, - expected_imm: Option| { - let op_32 = inst_32.parse_opcode(Isa::Rv64).unwrap(); - assert_eq!(op_32, expected_op); - assert_eq!(inst_32.parse_rd(&op_32).unwrap(), expected_rd); - assert_eq!(inst_32.parse_rs1(&op_32).unwrap(), expected_rs1); - assert_eq!(inst_32.parse_rs2(&op_32).unwrap(), expected_rs2); - assert_eq!(inst_32.parse_imm(&op_32, Isa::Rv64).unwrap(), expected_imm); - }; - test_32( - 0b000001101100010101101010110000, + test_32_in_rv64( + 0b1100001101100001101100010011011, OpcodeKind::Zbb(ZbbOpcode::RORIW), - Some(0), - Some(6), + Some(17), + Some(1), None, - Some(10), + Some(27), ); - test_32( - 0b000001001110110111100111011000, + test_32_in_rv64( + 0b1100001000011111101111100010011, OpcodeKind::Zbb(ZbbOpcode::RORI), - Some(10), - Some(14), + Some(30), + Some(31), None, - Some(14), + Some(16), ); - test_32( - 0b000011101111110101100110110000, + test_32_in_rv64( + 0b1100000000110000001110100111011, OpcodeKind::Zbb(ZbbOpcode::ROLW), - Some(15), - Some(6), - Some(6), + Some(26), + Some(16), + Some(1), None, ); - test_32( - 0b000011101100110111000011110000, + test_32_in_rv64( + 0b1100001000000011101101010111011, OpcodeKind::Zbb(ZbbOpcode::RORW), - Some(2), - Some(12), + Some(21), Some(3), + Some(16), None, ); - test_32( - 0b000011001111011111000111100000, + test_32_in_rv64( + 0b1000000010101110111010100110011, OpcodeKind::Zbb(ZbbOpcode::ANDN), - Some(12), - Some(12), - Some(7), + Some(10), + Some(14), + Some(5), None, ); - test_32( - 0b000011001100011010010000100000, + test_32_in_rv64( + 0b1000000001001100110111100110011, OpcodeKind::Zbb(ZbbOpcode::ORN), - Some(1), - Some(9), - Some(0), + Some(30), + Some(12), + Some(2), None, ); - test_32( - 0b000011001111110010111110100000, + test_32_in_rv64( + 0b1000001011001111100111100110011, OpcodeKind::Zbb(ZbbOpcode::XNOR), + Some(30), Some(15), - Some(11), - Some(14), + Some(22), None, ); - test_32( - 0b000011001111011000111011000101, + test_32_in_rv64( + 0b001011111010100110101110110011, OpcodeKind::Zbb(ZbbOpcode::MAX), - Some(13), - Some(3), - Some(11), + Some(23), + Some(20), + Some(30), None, ); - test_32( - 0b000011001101011101001000000101, + test_32_in_rv64( + 0b001010001111111111001000110011, OpcodeKind::Zbb(ZbbOpcode::MAXU), Some(4), - Some(4), - Some(8), + Some(31), + Some(3), None, ); - test_32( - 0b000011001100010000100101000101, + test_32_in_rv64( + 0b001010011111011100011110110011, OpcodeKind::Zbb(ZbbOpcode::MIN), - Some(0), - Some(2), - Some(5), + Some(15), + Some(27), + Some(7), None, ); - test_32( - 0b000011001110110101101100000101, + test_32_in_rv64( + 0b001011101101100101010100110011, OpcodeKind::Zbb(ZbbOpcode::MINU), - Some(11), - Some(6), + Some(10), Some(12), + Some(27), None, ); - test_32( - 0b000011001111000100110111110000, + test_32_in_rv64( + 0b1100000001100010001011100110011, OpcodeKind::Zbb(ZbbOpcode::ROL), - Some(12), + Some(14), + Some(2), Some(3), - Some(7), None, ); - test_32( - 0b000011001101010110100010110000, + test_32_in_rv64( + 0b1100001100011100101010000110011, OpcodeKind::Zbb(ZbbOpcode::ROR), - Some(5), - Some(10), - Some(2), + Some(8), + Some(28), + Some(24), None, ); - test_32( - 0b000001001110010101100100110000, + test_32_in_rv64( + 0b1100000010000110001001110010011, OpcodeKind::Zbb(ZbbOpcode::SEXTB), - Some(9), + Some(7), Some(6), None, None, ); - test_32( - 0b000001001100000101100101110000, + test_32_in_rv64( + 0b1100000010101110001001100010011, OpcodeKind::Zbb(ZbbOpcode::SEXTH), - Some(0), Some(6), + Some(14), None, None, ); - test_32( - 0b000011001100110010100000000100, - OpcodeKind::Zbb(ZbbOpcode::ZEXTH), - Some(2), - Some(10), - None, - None, - ); - test_32( - 0b000011101111010011010000000100, + test_32_in_rv64( + 0b001000000010000100001010111011, OpcodeKind::Zbb(ZbbOpcode::ZEXTH), - Some(13), - Some(13), - None, - None, - ); - test_32( - 0b000010011001101001011010011000, - OpcodeKind::Zbb(ZbbOpcode::REV8), - Some(2), - Some(2), + Some(5), + Some(16), None, None, ); - test_32( - 0b000010011111101011111010111000, + test_32_in_rv64( + 0b1101011100011010101010010010011, OpcodeKind::Zbb(ZbbOpcode::REV8), - Some(15), - Some(7), + Some(9), + Some(26), None, None, ); - test_32( - 0b000010011001101001001010000111, + test_32_in_rv64( + 0b101000011111111101110010010011, OpcodeKind::Zbb(ZbbOpcode::ORCB), - Some(2), - Some(2), + Some(25), + Some(31), None, None, ); - test_32( - 0b000010011110101010111000000010, + test_32_in_rv64( + 0b1100000001010111001000100010011, OpcodeKind::Zbb(ZbbOpcode::CPOP), - Some(13), - Some(5), + Some(2), + Some(23), None, None, ); - test_32( - 0b000011011100101010111000000010, + test_32_in_rv64( + 0b1100000001000000001110000011011, OpcodeKind::Zbb(ZbbOpcode::CPOPW), - Some(9), - Some(5), + Some(24), + Some(0), None, None, ); - test_32( - 0b000010011010001010011000000000, + test_32_in_rv64( + 0b1100000000001101001011010010011, OpcodeKind::Zbb(ZbbOpcode::CLZ), - Some(4), - Some(4), + Some(13), + Some(13), None, None, ); - test_32( - 0b000011011010001100011000000000, + test_32_in_rv64( + 0b1100000000001001001001100011011, OpcodeKind::Zbb(ZbbOpcode::CLZW), - Some(4), - Some(8), + Some(6), + Some(9), None, None, ); - test_32( - 0b000010011010101100111000000001, + test_32_in_rv64( + 0b1100000000111101001001110010011, OpcodeKind::Zbb(ZbbOpcode::CTZ), - Some(5), - Some(9), + Some(7), + Some(29), None, None, ); - test_32( - 0b000011011010101101111000000001, + test_32_in_rv64( + 0b1100000000110101001011100011011, OpcodeKind::Zbb(ZbbOpcode::CTZW), - Some(5), - Some(11), + Some(14), + Some(21), None, None, ); From 52ed890c3b92241f30274831af0f76a0cfdaa557 Mon Sep 17 00:00:00 2001 From: Alignof Date: Sun, 5 Oct 2025 18:46:34 +0900 Subject: [PATCH 5/7] [add] add doc comments to `ZbbOpcode` --- src/instruction/zbb_extension.rs | 48 ++++++++++++++++---------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/src/instruction/zbb_extension.rs b/src/instruction/zbb_extension.rs index 7674c01..4ed4b91 100644 --- a/src/instruction/zbb_extension.rs +++ b/src/instruction/zbb_extension.rs @@ -7,76 +7,76 @@ use core::fmt::{self, Display, Formatter}; #[allow(non_camel_case_types, clippy::upper_case_acronyms)] #[derive(Debug, PartialEq)] pub enum ZbbOpcode { - /// TODO: Add a description of the instruction here. + /// Rotate Right Word by Immediate RORIW, - /// TODO: Add a description of the instruction here. + /// Rotate Right (Immediate) RORI, - /// TODO: Add a description of the instruction here. + /// Rotate Left Word (Register) ROLW, - /// TODO: Add a description of the instruction here. + /// Rotate Right Word (Register) RORW, - /// TODO: Add a description of the instruction here. + /// AND with inverted operand ANDN, - /// TODO: Add a description of the instruction here. + /// OR with inverted operand ORN, - /// TODO: Add a description of the instruction here. + /// Exclusive NOR XNOR, - /// TODO: Add a description of the instruction here. + /// Maximum MAX, - /// TODO: Add a description of the instruction here. + /// Unsigned maximum MAXU, - /// TODO: Add a description of the instruction here. + /// Minimum MIN, - /// TODO: Add a description of the instruction here. + /// Unsigned minimum MINU, - /// TODO: Add a description of the instruction here. + /// Rotate Left (Register) ROL, - /// TODO: Add a description of the instruction here. + /// Rotate Right ROR, - /// TODO: Add a description of the instruction here. + /// Sign-extend byte SEXTB, - /// TODO: Add a description of the instruction here. + /// Sign-extend halfword SEXTH, - /// TODO: Add a description of the instruction here. + /// Zero-extend halfword ZEXTH, - /// TODO: Add a description of the instruction here. + /// Byte-reverse register REV8, - /// TODO: Add a description of the instruction here. + /// Bitwise OR-Combine, byte granule ORCB, - /// TODO: Add a description of the instruction here. + /// Count set bits CPOP, - /// TODO: Add a description of the instruction here. + /// Count set bits in word CPOPW, - /// TODO: Add a description of the instruction here. + /// Count leading zero bits CLZ, - /// TODO: Add a description of the instruction here. + /// Count leading zero bits in word CLZW, - /// TODO: Add a description of the instruction here. + /// Count leading zero bits CTZ, - /// TODO: Add a description of the instruction here. + /// Count leading zero bits in word CTZW, } From 8ca923d4fca7a5af718b06d4c82a7190d78f5490 Mon Sep 17 00:00:00 2001 From: Alignof Date: Sun, 5 Oct 2025 19:16:28 +0900 Subject: [PATCH 6/7] [refactor] fix cargo clippy warnings --- src/decode/inst_32.rs | 11 +- src/decode/zbb_extension.rs | 192 ++++++++++++++++--------------- src/instruction/zbb_extension.rs | 48 ++++---- 3 files changed, 124 insertions(+), 127 deletions(-) diff --git a/src/decode/inst_32.rs b/src/decode/inst_32.rs index 8e8c5f3..4d3ce4f 100644 --- a/src/decode/inst_32.rs +++ b/src/decode/inst_32.rs @@ -165,10 +165,10 @@ impl DecodeUtil for u32 { _ => Ok(Extensions::BaseI), }, 0b000_0101 => match funct3 { - 0b001 | 0b010 | 0b100 | 0b101 | 0b110 | 0b011 | 0b111 => Ok(Extensions::Zbb), + 0b001..=0b111 => Ok(Extensions::Zbb), _ => Ok(Extensions::BaseI), }, - 0b001_0100 => match funct3 { + 0b001_0100 | 0b011_0100 => match funct3 { 0b001 => Ok(Extensions::Zbb), _ => Ok(Extensions::BaseI), }, @@ -176,10 +176,6 @@ impl DecodeUtil for u32 { 0b100 | 0b110 | 0b111 => Ok(Extensions::Zbb), _ => Ok(Extensions::BaseI), }, - 0b011_0100 => match funct3 { - 0b001 => Ok(Extensions::Zbb), - _ => Ok(Extensions::BaseI), - }, 0b011_0000 => match funct3 { 0b001 | 0b101 => Ok(Extensions::Zbb), _ => Ok(Extensions::BaseI), @@ -189,8 +185,7 @@ impl DecodeUtil for u32 { 0b011_1011 => match funct7 { 0b000_0000 | 0b010_0000 => Ok(Extensions::BaseI), 0b000_0001 => Ok(Extensions::M), - 0b000_0100 => Ok(Extensions::Zbb), - 0b011_0000 => Ok(Extensions::Zbb), + 0b000_0100 | 0b011_0000 => Ok(Extensions::Zbb), _ => Err(DecodingError::UnknownExtension), }, 0b111_0011 => match funct3 { diff --git a/src/decode/zbb_extension.rs b/src/decode/zbb_extension.rs index cf0d534..dae827a 100644 --- a/src/decode/zbb_extension.rs +++ b/src/decode/zbb_extension.rs @@ -10,7 +10,6 @@ pub mod bit_32 { let op_31_20: u16 = u16::try_from(inst.slice(31, 20)).unwrap(); let op_24_20: u8 = u8::try_from(inst.slice(24, 20)).unwrap(); let op_31_25: u8 = u8::try_from(inst.slice(31, 25)).unwrap(); - let op_31_26: u8 = u8::try_from(inst.slice(31, 26)).unwrap(); match op_6_0 { 0b111011 => match op_14_12 { 0b1 => Ok(ZbbOpcode::ROLW), @@ -75,64 +74,66 @@ pub mod bit_32 { } /// Parsing Zbb instruction's rd + #[allow(clippy::unnecessary_wraps)] pub fn parse_rd(inst: u32, opkind: &ZbbOpcode) -> Option { let rd_11_7: usize = inst.slice(11, 7) as usize; match opkind { - ZbbOpcode::RORIW => Some(rd_11_7), - ZbbOpcode::RORI => Some(rd_11_7), - ZbbOpcode::ROLW => Some(rd_11_7), - ZbbOpcode::RORW => Some(rd_11_7), - ZbbOpcode::ANDN => Some(rd_11_7), - ZbbOpcode::ORN => Some(rd_11_7), - ZbbOpcode::XNOR => Some(rd_11_7), - ZbbOpcode::MAX => Some(rd_11_7), - ZbbOpcode::MAXU => Some(rd_11_7), - ZbbOpcode::MIN => Some(rd_11_7), - ZbbOpcode::MINU => Some(rd_11_7), - ZbbOpcode::ROL => Some(rd_11_7), - ZbbOpcode::ROR => Some(rd_11_7), - ZbbOpcode::SEXTB => Some(rd_11_7), - ZbbOpcode::SEXTH => Some(rd_11_7), - ZbbOpcode::ZEXTH => Some(rd_11_7), - ZbbOpcode::REV8 => Some(rd_11_7), - ZbbOpcode::ORCB => Some(rd_11_7), - ZbbOpcode::CPOP => Some(rd_11_7), - ZbbOpcode::CPOPW => Some(rd_11_7), - ZbbOpcode::CLZ => Some(rd_11_7), - ZbbOpcode::CLZW => Some(rd_11_7), - ZbbOpcode::CTZ => Some(rd_11_7), - ZbbOpcode::CTZW => Some(rd_11_7), + ZbbOpcode::RORIW + | ZbbOpcode::RORI + | ZbbOpcode::ROLW + | ZbbOpcode::RORW + | ZbbOpcode::ANDN + | ZbbOpcode::ORN + | ZbbOpcode::XNOR + | ZbbOpcode::MAX + | ZbbOpcode::MAXU + | ZbbOpcode::MIN + | ZbbOpcode::MINU + | ZbbOpcode::ROL + | ZbbOpcode::ROR + | ZbbOpcode::SEXTB + | ZbbOpcode::SEXTH + | ZbbOpcode::ZEXTH + | ZbbOpcode::REV8 + | ZbbOpcode::ORCB + | ZbbOpcode::CPOP + | ZbbOpcode::CPOPW + | ZbbOpcode::CLZ + | ZbbOpcode::CLZW + | ZbbOpcode::CTZ + | ZbbOpcode::CTZW => Some(rd_11_7), } } /// Parsing Zbb instruction's rs1 + #[allow(clippy::unnecessary_wraps)] pub fn parse_rs1(inst: u32, opkind: &ZbbOpcode) -> Option { let rs1_19_15: usize = inst.slice(19, 15) as usize; match opkind { - ZbbOpcode::RORIW => Some(rs1_19_15), - ZbbOpcode::RORI => Some(rs1_19_15), - ZbbOpcode::ROLW => Some(rs1_19_15), - ZbbOpcode::RORW => Some(rs1_19_15), - ZbbOpcode::ANDN => Some(rs1_19_15), - ZbbOpcode::ORN => Some(rs1_19_15), - ZbbOpcode::XNOR => Some(rs1_19_15), - ZbbOpcode::MAX => Some(rs1_19_15), - ZbbOpcode::MAXU => Some(rs1_19_15), - ZbbOpcode::MIN => Some(rs1_19_15), - ZbbOpcode::MINU => Some(rs1_19_15), - ZbbOpcode::ROL => Some(rs1_19_15), - ZbbOpcode::ROR => Some(rs1_19_15), - ZbbOpcode::SEXTB => Some(rs1_19_15), - ZbbOpcode::SEXTH => Some(rs1_19_15), - ZbbOpcode::ZEXTH => Some(rs1_19_15), - ZbbOpcode::REV8 => Some(rs1_19_15), - ZbbOpcode::ORCB => Some(rs1_19_15), - ZbbOpcode::CPOP => Some(rs1_19_15), - ZbbOpcode::CPOPW => Some(rs1_19_15), - ZbbOpcode::CLZ => Some(rs1_19_15), - ZbbOpcode::CLZW => Some(rs1_19_15), - ZbbOpcode::CTZ => Some(rs1_19_15), - ZbbOpcode::CTZW => Some(rs1_19_15), + ZbbOpcode::RORIW + | ZbbOpcode::RORI + | ZbbOpcode::ROLW + | ZbbOpcode::RORW + | ZbbOpcode::ANDN + | ZbbOpcode::ORN + | ZbbOpcode::XNOR + | ZbbOpcode::MAX + | ZbbOpcode::MAXU + | ZbbOpcode::MIN + | ZbbOpcode::MINU + | ZbbOpcode::ROL + | ZbbOpcode::ROR + | ZbbOpcode::SEXTB + | ZbbOpcode::SEXTH + | ZbbOpcode::ZEXTH + | ZbbOpcode::REV8 + | ZbbOpcode::ORCB + | ZbbOpcode::CPOP + | ZbbOpcode::CPOPW + | ZbbOpcode::CLZ + | ZbbOpcode::CLZW + | ZbbOpcode::CTZ + | ZbbOpcode::CTZW => Some(rs1_19_15), } } @@ -140,62 +141,63 @@ pub mod bit_32 { pub fn parse_rs2(inst: u32, opkind: &ZbbOpcode) -> Option { let rs2_24_20: usize = inst.slice(24, 20) as usize; match opkind { - ZbbOpcode::RORIW => None, - ZbbOpcode::RORI => None, - ZbbOpcode::ROLW => Some(rs2_24_20), - ZbbOpcode::RORW => Some(rs2_24_20), - ZbbOpcode::ANDN => Some(rs2_24_20), - ZbbOpcode::ORN => Some(rs2_24_20), - ZbbOpcode::XNOR => Some(rs2_24_20), - ZbbOpcode::MAX => Some(rs2_24_20), - ZbbOpcode::MAXU => Some(rs2_24_20), - ZbbOpcode::MIN => Some(rs2_24_20), - ZbbOpcode::MINU => Some(rs2_24_20), - ZbbOpcode::ROL => Some(rs2_24_20), - ZbbOpcode::ROR => Some(rs2_24_20), - ZbbOpcode::SEXTB => None, - ZbbOpcode::SEXTH => None, - ZbbOpcode::ZEXTH => None, - ZbbOpcode::REV8 => None, - ZbbOpcode::ORCB => None, - ZbbOpcode::CPOP => None, - ZbbOpcode::CPOPW => None, - ZbbOpcode::CLZ => None, - ZbbOpcode::CLZW => None, - ZbbOpcode::CTZ => None, - ZbbOpcode::CTZW => None, + ZbbOpcode::ROLW + | ZbbOpcode::RORW + | ZbbOpcode::ANDN + | ZbbOpcode::ORN + | ZbbOpcode::XNOR + | ZbbOpcode::MAX + | ZbbOpcode::MAXU + | ZbbOpcode::MIN + | ZbbOpcode::MINU + | ZbbOpcode::ROL + | ZbbOpcode::ROR => Some(rs2_24_20), + ZbbOpcode::RORIW + | ZbbOpcode::RORI + | ZbbOpcode::SEXTB + | ZbbOpcode::SEXTH + | ZbbOpcode::ZEXTH + | ZbbOpcode::REV8 + | ZbbOpcode::ORCB + | ZbbOpcode::CPOP + | ZbbOpcode::CPOPW + | ZbbOpcode::CLZ + | ZbbOpcode::CLZW + | ZbbOpcode::CTZ + | ZbbOpcode::CTZW => None, } } /// Parsing Zbb instruction's imm + #[allow(clippy::cast_possible_wrap)] pub fn parse_imm(inst: u32, opkind: &ZbbOpcode) -> Option { let imm_24_20: i32 = inst.slice(24, 20) as i32; let imm_25_20: i32 = inst.slice(25, 20) as i32; match opkind { ZbbOpcode::RORIW => Some(imm_24_20), ZbbOpcode::RORI => Some(imm_25_20), - ZbbOpcode::ROLW => None, - ZbbOpcode::RORW => None, - ZbbOpcode::ANDN => None, - ZbbOpcode::ORN => None, - ZbbOpcode::XNOR => None, - ZbbOpcode::MAX => None, - ZbbOpcode::MAXU => None, - ZbbOpcode::MIN => None, - ZbbOpcode::MINU => None, - ZbbOpcode::ROL => None, - ZbbOpcode::ROR => None, - ZbbOpcode::SEXTB => None, - ZbbOpcode::SEXTH => None, - ZbbOpcode::ZEXTH => None, - ZbbOpcode::REV8 => None, - ZbbOpcode::ORCB => None, - ZbbOpcode::CPOP => None, - ZbbOpcode::CPOPW => None, - ZbbOpcode::CLZ => None, - ZbbOpcode::CLZW => None, - ZbbOpcode::CTZ => None, - ZbbOpcode::CTZW => None, + ZbbOpcode::ROLW + | ZbbOpcode::RORW + | ZbbOpcode::ANDN + | ZbbOpcode::ORN + | ZbbOpcode::XNOR + | ZbbOpcode::MAX + | ZbbOpcode::MAXU + | ZbbOpcode::MIN + | ZbbOpcode::MINU + | ZbbOpcode::ROL + | ZbbOpcode::ROR + | ZbbOpcode::SEXTB + | ZbbOpcode::SEXTH + | ZbbOpcode::ZEXTH + | ZbbOpcode::REV8 + | ZbbOpcode::ORCB + | ZbbOpcode::CPOP + | ZbbOpcode::CPOPW + | ZbbOpcode::CLZ + | ZbbOpcode::CLZW + | ZbbOpcode::CTZ + | ZbbOpcode::CTZW => None, } } } diff --git a/src/instruction/zbb_extension.rs b/src/instruction/zbb_extension.rs index 4ed4b91..a89f262 100644 --- a/src/instruction/zbb_extension.rs +++ b/src/instruction/zbb_extension.rs @@ -114,30 +114,30 @@ impl Display for ZbbOpcode { impl Opcode for ZbbOpcode { fn get_format(&self) -> InstFormat { match self { - ZbbOpcode::RORIW => InstFormat::RFormat, - ZbbOpcode::RORI => InstFormat::RFormat, - ZbbOpcode::ROLW => InstFormat::RFormat, - ZbbOpcode::RORW => InstFormat::RFormat, - ZbbOpcode::ANDN => InstFormat::RFormat, - ZbbOpcode::ORN => InstFormat::RFormat, - ZbbOpcode::XNOR => InstFormat::RFormat, - ZbbOpcode::MAX => InstFormat::RFormat, - ZbbOpcode::MAXU => InstFormat::RFormat, - ZbbOpcode::MIN => InstFormat::RFormat, - ZbbOpcode::MINU => InstFormat::RFormat, - ZbbOpcode::ROL => InstFormat::RFormat, - ZbbOpcode::ROR => InstFormat::RFormat, - ZbbOpcode::SEXTB => InstFormat::RShamtFormat, - ZbbOpcode::SEXTH => InstFormat::RShamtFormat, - ZbbOpcode::ZEXTH => InstFormat::RShamtFormat, - ZbbOpcode::REV8 => InstFormat::RShamtFormat, - ZbbOpcode::ORCB => InstFormat::RShamtFormat, - ZbbOpcode::CPOP => InstFormat::RShamtFormat, - ZbbOpcode::CPOPW => InstFormat::RShamtFormat, - ZbbOpcode::CLZ => InstFormat::RShamtFormat, - ZbbOpcode::CLZW => InstFormat::RShamtFormat, - ZbbOpcode::CTZ => InstFormat::RShamtFormat, - ZbbOpcode::CTZW => InstFormat::RShamtFormat, + ZbbOpcode::RORIW + | ZbbOpcode::RORI + | ZbbOpcode::ROLW + | ZbbOpcode::RORW + | ZbbOpcode::ANDN + | ZbbOpcode::ORN + | ZbbOpcode::XNOR + | ZbbOpcode::MAX + | ZbbOpcode::MAXU + | ZbbOpcode::MIN + | ZbbOpcode::MINU + | ZbbOpcode::ROL + | ZbbOpcode::ROR => InstFormat::RFormat, + ZbbOpcode::SEXTB + | ZbbOpcode::SEXTH + | ZbbOpcode::ZEXTH + | ZbbOpcode::REV8 + | ZbbOpcode::ORCB + | ZbbOpcode::CPOP + | ZbbOpcode::CPOPW + | ZbbOpcode::CLZ + | ZbbOpcode::CLZW + | ZbbOpcode::CTZ + | ZbbOpcode::CTZW => InstFormat::RShamtFormat, } } } From fa5a0c4806154060c12a2a2af8883ab58d183636 Mon Sep 17 00:00:00 2001 From: Alignof Date: Sun, 5 Oct 2025 19:24:29 +0900 Subject: [PATCH 7/7] [refactor] add under score derimiter to address clippy warnings --- src/decode/zbb_extension.rs | 88 ++++++++++++++++++------------------- 1 file changed, 44 insertions(+), 44 deletions(-) diff --git a/src/decode/zbb_extension.rs b/src/decode/zbb_extension.rs index dae827a..dff2e80 100644 --- a/src/decode/zbb_extension.rs +++ b/src/decode/zbb_extension.rs @@ -11,32 +11,32 @@ pub mod bit_32 { let op_24_20: u8 = u8::try_from(inst.slice(24, 20)).unwrap(); let op_31_25: u8 = u8::try_from(inst.slice(31, 25)).unwrap(); match op_6_0 { - 0b111011 => match op_14_12 { + 0b11_1011 => match op_14_12 { 0b1 => Ok(ZbbOpcode::ROLW), 0b100 => Ok(ZbbOpcode::ZEXTH), 0b101 => Ok(ZbbOpcode::RORW), _ => Err(DecodingError::InvalidOpcode), }, - 0b11011 => match op_14_12 { + 0b1_1011 => match op_14_12 { 0b101 => Ok(ZbbOpcode::RORIW), 0b1 => match op_31_20 { - 0b11000000000 => Ok(ZbbOpcode::CLZW), - 0b11000000001 => Ok(ZbbOpcode::CTZW), - 0b11000000010 => Ok(ZbbOpcode::CPOPW), + 0b110_0000_0000 => Ok(ZbbOpcode::CLZW), + 0b110_0000_0001 => Ok(ZbbOpcode::CTZW), + 0b110_0000_0010 => Ok(ZbbOpcode::CPOPW), _ => Err(DecodingError::InvalidOpcode), }, _ => Err(DecodingError::InvalidOpcode), }, - 0b10011 => match op_14_12 { + 0b1_0011 => match op_14_12 { 0b101 => match op_31_20 { - 0b1010000111 => Ok(ZbbOpcode::ORCB), - 0b11010111000 => Ok(ZbbOpcode::REV8), + 0b10_1000_0111 => Ok(ZbbOpcode::ORCB), + 0b110_1011_1000 => Ok(ZbbOpcode::REV8), _ => Ok(ZbbOpcode::RORI), }, 0b1 => match op_31_20 { - 0b11000000000 => Ok(ZbbOpcode::CLZ), - 0b11000000001 => Ok(ZbbOpcode::CTZ), - 0b11000000010 => Ok(ZbbOpcode::CPOP), + 0b110_0000_0000 => Ok(ZbbOpcode::CLZ), + 0b110_0000_0001 => Ok(ZbbOpcode::CTZ), + 0b110_0000_0010 => Ok(ZbbOpcode::CPOP), _ => match op_24_20 { 0b100 => Ok(ZbbOpcode::SEXTB), 0b101 => Ok(ZbbOpcode::SEXTH), @@ -45,26 +45,26 @@ pub mod bit_32 { }, _ => Err(DecodingError::InvalidOpcode), }, - 0b110011 => match op_14_12 { + 0b11_0011 => match op_14_12 { 0b1 => Ok(ZbbOpcode::ROL), 0b100 => match op_31_25 { - 0b00101 => Ok(ZbbOpcode::MIN), - 0b100000 => Ok(ZbbOpcode::XNOR), + 0b0_0101 => Ok(ZbbOpcode::MIN), + 0b10_0000 => Ok(ZbbOpcode::XNOR), _ => Err(DecodingError::InvalidOpcode), }, 0b101 => match op_31_25 { - 0b00101 => Ok(ZbbOpcode::MINU), - 0b110000 => Ok(ZbbOpcode::ROR), + 0b0_0101 => Ok(ZbbOpcode::MINU), + 0b11_0000 => Ok(ZbbOpcode::ROR), _ => Err(DecodingError::InvalidOpcode), }, 0b110 => match op_31_25 { - 0b00101 => Ok(ZbbOpcode::MAX), - 0b100000 => Ok(ZbbOpcode::ORN), + 0b0_0101 => Ok(ZbbOpcode::MAX), + 0b10_0000 => Ok(ZbbOpcode::ORN), _ => Err(DecodingError::InvalidOpcode), }, 0b111 => match op_31_25 { - 0b00101 => Ok(ZbbOpcode::MAXU), - 0b100000 => Ok(ZbbOpcode::ANDN), + 0b0_0101 => Ok(ZbbOpcode::MAXU), + 0b10_0000 => Ok(ZbbOpcode::ANDN), _ => Err(DecodingError::InvalidOpcode), }, _ => Err(DecodingError::InvalidOpcode), @@ -212,7 +212,7 @@ mod test_zbb { use crate::OpcodeKind; test_32_in_rv64( - 0b1100001101100001101100010011011, + 0b110_0001_1011_0000_1101_1000_1001_1011, OpcodeKind::Zbb(ZbbOpcode::RORIW), Some(17), Some(1), @@ -220,7 +220,7 @@ mod test_zbb { Some(27), ); test_32_in_rv64( - 0b1100001000011111101111100010011, + 0b110_0001_0000_1111_1101_1111_0001_0011, OpcodeKind::Zbb(ZbbOpcode::RORI), Some(30), Some(31), @@ -228,7 +228,7 @@ mod test_zbb { Some(16), ); test_32_in_rv64( - 0b1100000000110000001110100111011, + 0b110_0000_0001_1000_0001_1101_0011_1011, OpcodeKind::Zbb(ZbbOpcode::ROLW), Some(26), Some(16), @@ -236,7 +236,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100001000000011101101010111011, + 0b110_0001_0000_0001_1101_1010_1011_1011, OpcodeKind::Zbb(ZbbOpcode::RORW), Some(21), Some(3), @@ -244,7 +244,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1000000010101110111010100110011, + 0b100_0000_0101_0111_0111_0101_0011_0011, OpcodeKind::Zbb(ZbbOpcode::ANDN), Some(10), Some(14), @@ -252,7 +252,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1000000001001100110111100110011, + 0b100_0000_0010_0110_0110_1111_0011_0011, OpcodeKind::Zbb(ZbbOpcode::ORN), Some(30), Some(12), @@ -260,7 +260,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1000001011001111100111100110011, + 0b100_0001_0110_0111_1100_1111_0011_0011, OpcodeKind::Zbb(ZbbOpcode::XNOR), Some(30), Some(15), @@ -268,7 +268,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b001011111010100110101110110011, + 0b00_1011_1110_1010_0110_1011_1011_0011, OpcodeKind::Zbb(ZbbOpcode::MAX), Some(23), Some(20), @@ -276,7 +276,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b001010001111111111001000110011, + 0b00_1010_0011_1111_1111_0010_0011_0011, OpcodeKind::Zbb(ZbbOpcode::MAXU), Some(4), Some(31), @@ -284,7 +284,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b001010011111011100011110110011, + 0b00_1010_0111_1101_1100_0111_1011_0011, OpcodeKind::Zbb(ZbbOpcode::MIN), Some(15), Some(27), @@ -292,7 +292,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b001011101101100101010100110011, + 0b00_1011_1011_0110_0101_0101_0011_0011, OpcodeKind::Zbb(ZbbOpcode::MINU), Some(10), Some(12), @@ -300,7 +300,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100000001100010001011100110011, + 0b110_0000_0011_0001_0001_0111_0011_0011, OpcodeKind::Zbb(ZbbOpcode::ROL), Some(14), Some(2), @@ -308,7 +308,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100001100011100101010000110011, + 0b110_0001_1000_1110_0101_0100_0011_0011, OpcodeKind::Zbb(ZbbOpcode::ROR), Some(8), Some(28), @@ -316,7 +316,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100000010000110001001110010011, + 0b110_0000_0100_0011_0001_0011_1001_0011, OpcodeKind::Zbb(ZbbOpcode::SEXTB), Some(7), Some(6), @@ -324,7 +324,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100000010101110001001100010011, + 0b110_0000_0101_0111_0001_0011_0001_0011, OpcodeKind::Zbb(ZbbOpcode::SEXTH), Some(6), Some(14), @@ -332,7 +332,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b001000000010000100001010111011, + 0b00_1000_0000_1000_0100_0010_1011_1011, OpcodeKind::Zbb(ZbbOpcode::ZEXTH), Some(5), Some(16), @@ -340,7 +340,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1101011100011010101010010010011, + 0b110_1011_1000_1101_0101_0100_1001_0011, OpcodeKind::Zbb(ZbbOpcode::REV8), Some(9), Some(26), @@ -348,7 +348,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b101000011111111101110010010011, + 0b10_1000_0111_1111_1101_1100_1001_0011, OpcodeKind::Zbb(ZbbOpcode::ORCB), Some(25), Some(31), @@ -356,7 +356,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100000001010111001000100010011, + 0b110_0000_0010_1011_1001_0001_0001_0011, OpcodeKind::Zbb(ZbbOpcode::CPOP), Some(2), Some(23), @@ -364,7 +364,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100000001000000001110000011011, + 0b110_0000_0010_0000_0001_1100_0001_1011, OpcodeKind::Zbb(ZbbOpcode::CPOPW), Some(24), Some(0), @@ -372,7 +372,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100000000001101001011010010011, + 0b110_0000_0000_0110_1001_0110_1001_0011, OpcodeKind::Zbb(ZbbOpcode::CLZ), Some(13), Some(13), @@ -380,7 +380,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100000000001001001001100011011, + 0b110_0000_0000_0100_1001_0011_0001_1011, OpcodeKind::Zbb(ZbbOpcode::CLZW), Some(6), Some(9), @@ -388,7 +388,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100000000111101001001110010011, + 0b110_0000_0001_1110_1001_0011_1001_0011, OpcodeKind::Zbb(ZbbOpcode::CTZ), Some(7), Some(29), @@ -396,7 +396,7 @@ mod test_zbb { None, ); test_32_in_rv64( - 0b1100000000110101001011100011011, + 0b110_0000_0001_1010_1001_0111_0001_1011, OpcodeKind::Zbb(ZbbOpcode::CTZW), Some(14), Some(21),